dt-bindings: arm: qcom: add bindings for QCS615 talos evk board

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
https://lore.kernel.org/all/[email protected]/

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +220 -0

@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "sm6150.dtsi"
+#include "pm8150.dtsi"
+/ {
+	aliases {
+		mmc0 = &sdhc_1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <32764>;
+			#clock-cells = <0>;
+		};
+
+		xo_board_clk: xo-board-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			#clock-cells = <0>;
+		};
+	};
+
+	regulator-usb2-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "USB2_VBUS";
+		gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&usb2_en>;
+		pinctrl-names = "default";
+		enable-active-high;
+		regulator-always-on;
+	};
+
+	vreg_v3p3_can: regulator-v3p3-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v3p3-can";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vreg_v5p0_can: regulator-v5p0-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v5p0-can";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&apps_rsc {
+	regulators-0 {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vreg_s3a: smps3 {
+			regulator-name = "vreg_s3a";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <650000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s4a: smps4 {
+			regulator-name = "vreg_s4a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1829000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s5a: smps5 {
+			regulator-name = "vreg_s5a";
+			regulator-min-microvolt = <1896000>;
+			regulator-max-microvolt = <2040000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s6a: smps6 {
+			regulator-name = "vreg_s6a";
+			regulator-min-microvolt = <1304000>;
+			regulator-max-microvolt = <1404000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l1a: ldo1 {
+			regulator-name = "vreg_l1a";
+			regulator-min-microvolt = <488000>;
+			regulator-max-microvolt = <852000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2a: ldo2 {
+			regulator-name = "vreg_l2a";
+			regulator-min-microvolt = <1650000>;
+			regulator-max-microvolt = <3100000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3a: ldo3 {
+			regulator-name = "vreg_l3a";
+			regulator-min-microvolt = <1000000>;
+			regulator-max-microvolt = <1248000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5a: ldo5 {
+			regulator-name = "vreg_l5a";
+			regulator-min-microvolt = <875000>;
+			regulator-max-microvolt = <975000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a: ldo7 {
+			regulator-name = "vreg_l7a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1900000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8a: ldo8 {
+			regulator-name = "vreg_l8a";
+			regulator-min-microvolt = <1150000>;
+			regulator-max-microvolt = <1350000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10a: ldo10 {
+			regulator-name = "vreg_l10a";
+			regulator-min-microvolt = <2950000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11a: ldo11 {
+			regulator-name = "vreg_l11a";
+			regulator-min-microvolt = <1232000>;
+			regulator-max-microvolt = <1260000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l12a: ldo12 {
+			regulator-name = "vreg_l12a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1890000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a: ldo13 {
+			regulator-name = "vreg_l13a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3230000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15a: ldo15 {
+			regulator-name = "vreg_l15a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1904000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16a: ldo16 {
+			regulator-name = "vreg_l16a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17a: ldo17 {
+			regulator-name = "vreg_l17a";
+			regulator-min-microvolt = <2950000>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +41 -0

+};
+
+&i2c5 {
+	status = "okay";
+
+	eeprom@57 {
+		compatible = "atmel,24c02";
+		reg = <0x57>;
+		pagesize = <16>;
+	};
+
+	eeprom@5f {
+		compatible = "atmel,24mac602";
+		reg = <0x5f>;
+		pagesize = <16>;
+	};
+};
+
+&pcie {
+	perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
+
+	pinctrl-0 = <&pcie_default_state>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&pcie_phy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+
+	status = "okay";
+};
+
+&pm8150_gpios {
+	usb2_en: usb2-en-state {
+		pins = "gpio10";
+		function = "normal";
+		output-enable;
+		power-source = <0>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +76 -0

+};
+
+&tlmm {
+	pcie_default_state: pcie-default-state {
+		clkreq-pins {
+			pins = "gpio90";
+			function = "pcie_clk_req";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-pins {
+			pins = "gpio101";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+
+		wake-pins {
+			pins = "gpio100";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+};
+
+&sdhc_1 {
+	pinctrl-0 = <&sdc1_state_on>;
+	pinctrl-1 = <&sdc1_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	bus-width = <8>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	vmmc-supply = <&vreg_l17a>;
+	vqmmc-supply = <&vreg_s4a>;
+
+	non-removable;
+	no-sd;
+	no-sdio;
+
+	status = "okay";
+};
+
+&spi6 {
+	status = "okay";
+
+	mcp2515@0 {
+		compatible = "microchip,mcp2515";
+		reg = <0>;
+		clock-frequency = <20000000>;
+		interrupts-extended = <&tlmm 87 IRQ_TYPE_LEVEL_LOW>;
+		spi-max-frequency = <10000000>;
+		vdd-supply = <&vreg_v3p3_can>;
+		xceiver-supply = <&vreg_v5p0_can>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;
+
+	status = "okay";
+};
+
+&usb_qmpphy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +6 -0

+};
+
+&usb_hsphy_2 {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +11 -0

+};
+
+&ufs_mem_hc {
+	reset-gpios = <&tlmm 123 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l17a>;
+	vcc-max-microamp = <600000>;
+	vccq2-supply = <&vreg_s4a>;
+	vccq2-max-microamp = <600000>;
+
+	status = "okay";
+};

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +1 -0

+};

Quoted 31 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

Quoted 5 lines

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

No WiFi/BT/ethernet?

Quoted 8 lines

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
https://lore.kernel.org/all/[email protected]/

This has been merged 9 months ago. Why do you mention it here?

Quoted 1 line

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

This one has been picked up in June.

Quoted 19 lines

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/Makefile +1 -0

index 4bfa926b6a08..588dc55995c5 100644
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= talos-evk.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
 

arch/arm64/boot/dts/qcom/qcs615-som.dtsi

Quoted 6 lines

arch/arm64/boot/dts/qcom/Makefile +0 -0

 qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +0 -0

new file mode 100644
index 000000000000..1b9b2581af42

talos-evk-som.dtsi?

Quoted 226 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +224 -0

@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "sm6150.dtsi"
+#include "pm8150.dtsi"
+/ {
+	aliases {
+		mmc0 = &sdhc_1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <32764>;
+			#clock-cells = <0>;
+		};
+
+		xo_board_clk: xo-board-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			#clock-cells = <0>;
+		};
+	};
+
+	regulator-usb2-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "USB2_VBUS";
+		gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&usb2_en>;
+		pinctrl-names = "default";
+		enable-active-high;
+		regulator-always-on;
+	};
+
+	vreg_v3p3_can: regulator-v3p3-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v3p3-can";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vreg_v5p0_can: regulator-v5p0-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v5p0-can";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&apps_rsc {
+	regulators-0 {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vreg_s3a: smps3 {
+			regulator-name = "vreg_s3a";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <650000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s4a: smps4 {
+			regulator-name = "vreg_s4a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1829000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s5a: smps5 {
+			regulator-name = "vreg_s5a";
+			regulator-min-microvolt = <1896000>;
+			regulator-max-microvolt = <2040000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s6a: smps6 {
+			regulator-name = "vreg_s6a";
+			regulator-min-microvolt = <1304000>;
+			regulator-max-microvolt = <1404000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l1a: ldo1 {
+			regulator-name = "vreg_l1a";
+			regulator-min-microvolt = <488000>;
+			regulator-max-microvolt = <852000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2a: ldo2 {
+			regulator-name = "vreg_l2a";
+			regulator-min-microvolt = <1650000>;
+			regulator-max-microvolt = <3100000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3a: ldo3 {
+			regulator-name = "vreg_l3a";
+			regulator-min-microvolt = <1000000>;
+			regulator-max-microvolt = <1248000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5a: ldo5 {
+			regulator-name = "vreg_l5a";
+			regulator-min-microvolt = <875000>;
+			regulator-max-microvolt = <975000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a: ldo7 {
+			regulator-name = "vreg_l7a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1900000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8a: ldo8 {
+			regulator-name = "vreg_l8a";
+			regulator-min-microvolt = <1150000>;
+			regulator-max-microvolt = <1350000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10a: ldo10 {
+			regulator-name = "vreg_l10a";
+			regulator-min-microvolt = <2950000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11a: ldo11 {
+			regulator-name = "vreg_l11a";
+			regulator-min-microvolt = <1232000>;
+			regulator-max-microvolt = <1260000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l12a: ldo12 {
+			regulator-name = "vreg_l12a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1890000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a: ldo13 {
+			regulator-name = "vreg_l13a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3230000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15a: ldo15 {
+			regulator-name = "vreg_l15a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1904000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16a: ldo16 {
+			regulator-name = "vreg_l16a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17a: ldo17 {
+			regulator-name = "vreg_l17a";
+			regulator-min-microvolt = <2950000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 230

Quoted 6 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +6 -0

+};
+
+&gcc {
+	clocks = <&rpmhcc RPMH_CXO_CLK>,
+		 <&rpmhcc RPMH_CXO_CLK_A>,
+		 <&sleep_clk>;

Why do you need this?

Quoted 46 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +45 -0

+};
+
+&i2c5 {
+	status = "okay";
+
+	eeprom@57 {
+		compatible = "atmel,24c02";
+		reg = <0x57>;
+		pagesize = <16>;
+	};
+
+	eeprom@5f {
+		compatible = "atmel,24mac602";
+		reg = <0x5f>;
+		pagesize = <16>;
+	};
+};
+
+&pcie {
+	perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
+
+	pinctrl-0 = <&pcie_default_state>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&pcie_phy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+
+	status = "okay";
+};
+
+&pm8150_gpios {
+	usb2_en: usb2-en-state {
+		pins = "gpio10";
+		function = "normal";
+		output-enable;
+		power-source = <0>;
+	};
+};
+
+&qupv3_id_0 {

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 281

Quoted 6 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +6 -0

+	status = "okay";
+};
+
+&remoteproc_adsp {
+	firmware-name = "qcom/qcs615/adsp.mbn";
+	status = "okay";

Empty line before status, please.

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 290

Quoted 10 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +9 -0

+};
+
+&remoteproc_cdsp {
+	firmware-name = "qcom/qcs615/cdsp.mbn";
+	status = "okay";
+};
+
+&rpmhcc {
+	clocks = <&xo_board_clk>;

Why do you need this?

Quoted 81 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +80 -0

+};
+
+&tlmm {
+	pcie_default_state: pcie-default-state {
+		clkreq-pins {
+			pins = "gpio90";
+			function = "pcie_clk_req";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-pins {
+			pins = "gpio101";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+
+		wake-pins {
+			pins = "gpio100";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+};
+
+&sdhc_1 {
+	pinctrl-0 = <&sdc1_state_on>;
+	pinctrl-1 = <&sdc1_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	bus-width = <8>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	vmmc-supply = <&vreg_l17a>;
+	vqmmc-supply = <&vreg_s4a>;
+
+	non-removable;
+	no-sd;
+	no-sdio;
+
+	status = "okay";
+};
+
+&spi6 {
+	status = "okay";
+
+	mcp2515@0 {
+		compatible = "microchip,mcp2515";
+		reg = <0>;
+		clock-frequency = <20000000>;
+		interrupts-extended = <&tlmm 87 IRQ_TYPE_LEVEL_LOW>;
+		spi-max-frequency = <10000000>;
+		vdd-supply = <&vreg_v3p3_can>;
+		xceiver-supply = <&vreg_v5p0_can>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;
+
+	status = "okay";
+};
+
+&usb_qmpphy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+
+	status = "okay";
+};
+

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 376

Quoted 6 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +6 -0

+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "host";

Is it actually the host-only interface?

Quoted 11 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +10 -0

+};
+
+&usb_hsphy_2 {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;
+
+	status = "okay";
+};
+

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 392

Quoted 6 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +6 -0

+&usb_2 {
+	status = "okay";
+};
+
+&usb_2_dwc3 {
+	dr_mode = "host";

And this one?

Quoted 16 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +15 -0

+};
+
+&ufs_mem_hc {
+	reset-gpios = <&tlmm 123 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l17a>;
+	vcc-max-microamp = <600000>;
+	vccq2-supply = <&vreg_s4a>;
+	vccq2-max-microamp = <600000>;
+
+	status = "okay";
+};
+
+&ufs_mem_phy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 413

Quoted 6 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +6 -0

+
+	status = "okay";
+};
+
+&watchdog {
+	clocks = <&sleep_clk>;

Why do you need this?

Quoted 2 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +1 -0

+};

Quoted 34 lines · Dmitry Baryshkov

Quoted 33 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

Quoted 5 lines

Quoted 3 lines

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

No WiFi/BT/ethernet?

Networking peripherals such as WiFi/BT and Ethernet will be enabled in follow-up patches.

Quoted 39 lines · Tessolve Upstream

Quoted 36 lines · Dmitry Baryshkov

Quoted 35 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

Quoted 5 lines

Quoted 3 lines

Quoted 1 line

- MCP2515 SPI to CAN

No WiFi/BT/ethernet?

Networking peripherals such as WiFi/BT and Ethernet will be enabled in follow-up patches.

Why? WiFi/BT are supported for the RIDE platform. Is EVK using something different?

Quoted 44 lines · Dmitry Baryshkov

Quoted 43 lines · Tessolve Upstream

Quoted 39 lines · Dmitry Baryshkov

Quoted 29 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

Quoted 7 lines

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

No WiFi/BT/ethernet?

Quoted 4 lines

Quoted 1 line

Networking peripherals such as WiFi/BT and Ethernet will be enabled in follow-up patches.

Why? WiFi/BT are supported for the RIDE platform. Is EVK using something different?

We used a Quectel based AF68E module (PCIe for WiFi and UART for Bluetooth), which is different from what is used on the RIDE platform. I plan to enable these in a follow-up patch series.

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
https://lore.kernel.org/all/[email protected]/
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/Makefile +0 -0

index 4bfa926b6a08..588dc55995c5 100644

Quoted 37 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

Quoted 7 lines

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
https://lore.kernel.org/all/[email protected]/
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

Quoted 8 lines

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/Makefile dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb · line 121

Quoted 10 lines

arch/arm64/boot/dts/qcom/Makefile +1 -0

index 4bfa926b6a08..588dc55995c5 100644
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= talos-evk.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb

BTW, 'talos' > 'qsc6490'. I think the list is expected to be sorted.

Quoted 38 lines · Dmitry Baryshkov

Quoted 37 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

Quoted 7 lines

Quoted 7 lines

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
https://lore.kernel.org/all/[email protected]/
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

Huge dependency list... basically unmergeable. But some of these were applied months ago, so you claiming there is dependency is just misleading. Or you are working on some old, downstream fork... In such case it would be NAK.

Quoted 7 lines

Quoted 7 lines

 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

Quoted 12 lines

arch/arm64/boot/dts/qcom/Makefile dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb · line 121

Quoted 10 lines

arch/arm64/boot/dts/qcom/Makefile +1 -0

index 4bfa926b6a08..588dc55995c5 100644
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= talos-evk.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb

BTW, 'talos' > 'qsc6490'. I think the list is expected to be sorted.

Yes it is.

Best regards,
Krzysztof

Quoted 52 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
https://lore.kernel.org/all/[email protected]/
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/Makefile dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb · line 121

Quoted 10 lines

arch/arm64/boot/dts/qcom/Makefile +1 -0

index 4bfa926b6a08..588dc55995c5 100644
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= talos-evk.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb

BTW, 'talos' > 'qsc6490'. I think the list is expected to be sorted.

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

https://lore.kernel.org/all/[email protected]/

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/Makefile +0 -0

index 4bfa926b6a08..588dc55995c5 100644

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +24 -0

+#include "sm6150.dtsi"
+#include "pm8150.dtsi"
+/ {
+	aliases {
+		mmc0 = &sdhc_1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <32764>;
+			#clock-cells = <0>;
+		};
+
+		xo_board_clk: xo-board-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			#clock-cells = <0>;
+		};

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +33 -0

+	};
+};
+
+&apps_rsc {
+	regulators-0 {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vreg_s3a: smps3 {
+			regulator-name = "vreg_s3a";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <650000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s4a: smps4 {
+			regulator-name = "vreg_s4a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1829000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s5a: smps5 {
+			regulator-name = "vreg_s5a";
+			regulator-min-microvolt = <1896000>;
+			regulator-max-microvolt = <2040000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s6a: smps6 {
+			regulator-name = "vreg_s6a";
+			regulator-min-microvolt = <1304000>;
+			regulator-max-microvolt = <1404000>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +116 -0

+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2a: ldo2 {
+			regulator-name = "vreg_l2a";
+			regulator-min-microvolt = <1650000>;
+			regulator-max-microvolt = <3100000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3a: ldo3 {
+			regulator-name = "vreg_l3a";
+			regulator-min-microvolt = <1000000>;
+			regulator-max-microvolt = <1248000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5a: ldo5 {
+			regulator-name = "vreg_l5a";
+			regulator-min-microvolt = <875000>;
+			regulator-max-microvolt = <975000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a: ldo7 {
+			regulator-name = "vreg_l7a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1900000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8a: ldo8 {
+			regulator-name = "vreg_l8a";
+			regulator-min-microvolt = <1150000>;
+			regulator-max-microvolt = <1350000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10a: ldo10 {
+			regulator-name = "vreg_l10a";
+			regulator-min-microvolt = <2950000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11a: ldo11 {
+			regulator-name = "vreg_l11a";
+			regulator-min-microvolt = <1232000>;
+			regulator-max-microvolt = <1260000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l12a: ldo12 {
+			regulator-name = "vreg_l12a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1890000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a: ldo13 {
+			regulator-name = "vreg_l13a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3230000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15a: ldo15 {
+			regulator-name = "vreg_l15a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1904000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16a: ldo16 {
+			regulator-name = "vreg_l16a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17a: ldo17 {
+			regulator-name = "vreg_l17a";
+			regulator-min-microvolt = <2950000>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +2 -0

+};
+

arch/arm64/boot/dts/qcom/talos-evk.dts new file +38 -0

+ */
+/dts-v1/;
+
+#include "qcs615-som.dtsi"
+
+/ {
+	model = "Qualcomm QCS615 IQ 615 EVK";
+	compatible = "qcom,qcs615-iq-615-evk", "qcom,qcs615", "qcom,sm6150";
+	chassis-type = "embedded";
+
+	aliases {
+		mmc1 = &sdhc_2;
+	};
+};
+
+&pon_pwrkey {
+	status = "okay";
+};
+
+&pon_resin {
+	linux,code = <KEY_VOLUMEDOWN>;
+
+	status = "okay";
+};
+
+&sdhc_2 {
+	pinctrl-0 = <&sdc2_state_on>;
+	pinctrl-1 = <&sdc2_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	bus-width = <4>;
+	cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
+
+	vmmc-supply = <&vreg_l10a>;
+	vqmmc-supply = <&vreg_s4a>;
+
+	status = "okay";
+};

Signature · 1 line

2.34.1

Quoted 35 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

Quoted 7 lines

- MCP2515 SPI to CAN

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

This was merged August 11.

Quoted 1 line

https://lore.kernel.org/all/[email protected]/

This was merged December 27.

Quoted 1 line

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

This was merged July 16.

You just wasted 5 minutes of my time, tracking down the status of these dependencies. Don't list dependencies that are already in linux-next (or actual releases), or even better, only send patches once the dependencies has landed (or send them together with the dependencies).

Quoted 8 lines

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/Makefile dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb · line 120

Quoted 9 lines

arch/arm64/boot/dts/qcom/Makefile +1 -0

index 4bfa926b6a08..588dc55995c5 100644
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= talos-evk.dtb

If you look a little bit harder, you can see that all other entries in this file is sorted alphabetically.

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 3

Quoted 13 lines

arch/arm64/boot/dts/qcom/Makefile +0 -0

 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
 
 qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +3 -0

new file mode 100644
index 000000000000..1b9b2581af42
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.

This is not the correct copyright statement.

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 9

Quoted 7 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +6 -0

+ */
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/gpio/gpio.h>

Once is probably sufficient.

Quoted 31 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +30 -0

+#include "sm6150.dtsi"
+#include "pm8150.dtsi"
+/ {
+	aliases {
+		mmc0 = &sdhc_1;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <32764>;
+			#clock-cells = <0>;
+		};
+
+		xo_board_clk: xo-board-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			#clock-cells = <0>;
+		};
+	};
+
+	regulator-usb2-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "USB2_VBUS";
+		gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 43

Quoted 4 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +4 -0

+		pinctrl-0 = <&usb2_en>;
+		pinctrl-names = "default";
+		enable-active-high;
+		regulator-always-on;

I forget where we are on this, but is there no way you can describe this to be the vbus for the connector and have it be consumed and enabled properly?

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 52

Quoted 10 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +9 -0

+	};
+
+	vreg_v3p3_can: regulator-v3p3-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v3p3-can";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;

Why can't the MCP2515 driver enable these when it's needed?

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 61

Quoted 10 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +9 -0

+	};
+
+	vreg_v5p0_can: regulator-v5p0-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v5p0-can";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;

Ditto

Quoted 34 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +33 -0

+	};
+};
+
+&apps_rsc {
+	regulators-0 {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vreg_s3a: smps3 {
+			regulator-name = "vreg_s3a";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <650000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s4a: smps4 {
+			regulator-name = "vreg_s4a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1829000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s5a: smps5 {
+			regulator-name = "vreg_s5a";
+			regulator-min-microvolt = <1896000>;
+			regulator-max-microvolt = <2040000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s6a: smps6 {
+			regulator-name = "vreg_s6a";
+			regulator-min-microvolt = <1304000>;
+			regulator-max-microvolt = <1404000>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 104

Quoted 10 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +10 -0

+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l1a: ldo1 {
+			regulator-name = "vreg_l1a";
+			regulator-min-microvolt = <488000>;
+			regulator-max-microvolt = <852000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM

Are you 100% certain that you (in contrast to all other boards) are ready to enable LPM - and make it the default mode?

Quoted 116 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +116 -0

+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2a: ldo2 {
+			regulator-name = "vreg_l2a";
+			regulator-min-microvolt = <1650000>;
+			regulator-max-microvolt = <3100000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3a: ldo3 {
+			regulator-name = "vreg_l3a";
+			regulator-min-microvolt = <1000000>;
+			regulator-max-microvolt = <1248000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5a: ldo5 {
+			regulator-name = "vreg_l5a";
+			regulator-min-microvolt = <875000>;
+			regulator-max-microvolt = <975000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a: ldo7 {
+			regulator-name = "vreg_l7a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1900000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8a: ldo8 {
+			regulator-name = "vreg_l8a";
+			regulator-min-microvolt = <1150000>;
+			regulator-max-microvolt = <1350000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10a: ldo10 {
+			regulator-name = "vreg_l10a";
+			regulator-min-microvolt = <2950000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11a: ldo11 {
+			regulator-name = "vreg_l11a";
+			regulator-min-microvolt = <1232000>;
+			regulator-max-microvolt = <1260000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l12a: ldo12 {
+			regulator-name = "vreg_l12a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1890000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a: ldo13 {
+			regulator-name = "vreg_l13a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3230000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15a: ldo15 {
+			regulator-name = "vreg_l15a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1904000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16a: ldo16 {
+			regulator-name = "vreg_l16a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
+			regulator-allow-set-load;
+			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+						   RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17a: ldo17 {
+			regulator-name = "vreg_l17a";
+			regulator-min-microvolt = <2950000>;

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 230

Quoted 10 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +10 -0

+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+};
+
+&gcc {
+	clocks = <&rpmhcc RPMH_CXO_CLK>,
+		 <&rpmhcc RPMH_CXO_CLK_A>,
+		 <&sleep_clk>;

This is already specified in sm6150.dtsi, why repeat them here?

PS. This list is incomplete and needs to be corrected.

Quoted 3 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +2 -0

+};
+

[..]

arch/arm64/boot/dts/qcom/talos-evk.dts line 3

Quoted 9 lines

arch/arm64/boot/dts/qcom/talos-evk.dts new file +3 -0

new file mode 100644
index 000000000000..7500f051783f
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.

Fix this please.

Regards,
Bjorn

Quoted 41 lines

arch/arm64/boot/dts/qcom/talos-evk.dts new file +38 -0

+ */
+/dts-v1/;
+
+#include "qcs615-som.dtsi"
+
+/ {
+	model = "Qualcomm QCS615 IQ 615 EVK";
+	compatible = "qcom,qcs615-iq-615-evk", "qcom,qcs615", "qcom,sm6150";
+	chassis-type = "embedded";
+
+	aliases {
+		mmc1 = &sdhc_2;
+	};
+};
+
+&pon_pwrkey {
+	status = "okay";
+};
+
+&pon_resin {
+	linux,code = <KEY_VOLUMEDOWN>;
+
+	status = "okay";
+};
+
+&sdhc_2 {
+	pinctrl-0 = <&sdc2_state_on>;
+	pinctrl-1 = <&sdc2_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	bus-width = <4>;
+	cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
+
+	vmmc-supply = <&vreg_l10a>;
+	vqmmc-supply = <&vreg_s4a>;
+
+	status = "okay";
+};

Signature · 1 line

2.34.1

Quoted 67 lines · Bjorn Andersson

Quoted 35 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

Quoted 7 lines

- MCP2515 SPI to CAN

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

This was merged August 11.

Quoted 1 line

https://lore.kernel.org/all/[email protected]/

This was merged December 27.

Quoted 1 line

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

This was merged July 16.

You just wasted 5 minutes of my time, tracking down the status of these dependencies. Don't list dependencies that are already in linux-next (or actual releases), or even better, only send patches once the dependencies has landed (or send them together with the dependencies).

Quoted 8 lines

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

Quoted 12 lines

arch/arm64/boot/dts/qcom/Makefile dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb · line 120

Quoted 9 lines

arch/arm64/boot/dts/qcom/Makefile +1 -0

index 4bfa926b6a08..588dc55995c5 100644
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= talos-evk.dtb

If you look a little bit harder, you can see that all other entries in this file is sorted alphabetically.

Yes, Will sort it in v2 patch.

Quoted 15 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 3

Quoted 13 lines

arch/arm64/boot/dts/qcom/Makefile +0 -0

 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
 
 qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +3 -0

new file mode 100644
index 000000000000..1b9b2581af42
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.

This is not the correct copyright statement.

Thanks for the review.
I used above copyright since qcs615-ride.dts in the same platform tree already follows this format.
If you’d prefer me to switch to The Linux Foundation for consistency with older DTS files, I can respin the patch accordingly.

Quoted 100 lines · Tessolve Upstream

Quoted 67 lines · Bjorn Andersson

Quoted 35 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the IQ-QCS615-SOM and the talos-evk carrier board.

The IQ-QCS615-SOM is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

Quoted 7 lines

- MCP2515 SPI to CAN

Signed-off-by Sudarshan Shetty <[email protected]>

---

This series depend on the below patch changes
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

This was merged August 11.

Quoted 1 line

https://lore.kernel.org/all/[email protected]/

This was merged December 27.

Quoted 1 line

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

This was merged July 16.

You just wasted 5 minutes of my time, tracking down the status of these dependencies. Don't list dependencies that are already in linux-next (or actual releases), or even better, only send patches once the dependencies has landed (or send them together with the dependencies).

Quoted 8 lines

---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qcs615-som.dtsi | 414 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts   |  42 +++
 3 files changed, 457 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs615-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

Quoted 12 lines

arch/arm64/boot/dts/qcom/Makefile dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb · line 120

Quoted 9 lines

arch/arm64/boot/dts/qcom/Makefile +1 -0

index 4bfa926b6a08..588dc55995c5 100644
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= talos-evk.dtb

If you look a little bit harder, you can see that all other entries in this file is sorted alphabetically.

Yes, Will sort it in v2 patch.

Quoted 15 lines

arch/arm64/boot/dts/qcom/qcs615-som.dtsi line 3

Quoted 13 lines

arch/arm64/boot/dts/qcom/Makefile +0 -0

 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
 
 qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo

arch/arm64/boot/dts/qcom/qcs615-som.dtsi new file +3 -0

new file mode 100644
index 000000000000..1b9b2581af42
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.

This is not the correct copyright statement.

Quoted 3 lines

Thanks for the review.
I used above copyright since qcs615-ride.dts in the same platform tree already follows this format.
If you’d prefer me to switch to The Linux Foundation for consistency with older DTS files, I can respin the patch accordingly.

Please check current marketing guidelines, then you won't have to ask such a question. Also please fix your mailer to wrap your responses on a useful boundary (usually 72-75 chars per line).

This adds binding support for the QCS615-based talos evk SMARC platform.

Signed-off-by Sudarshan Shetty <[email protected]>

---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

Documentation/devicetree/bindings/arm/qcom.yaml +0 -0

index 03a7d3c92ecd..a5dbe6af68ac 100644

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+          - const: qcom,qcs615
+          - const: qcom,sm6150
+
       - items:
           - enum:
               - qcom,sa8155p-adp

Signature · 1 line

2.34.1

Quoted 15 lines · Sudarshan Shetty

This adds binding support for the QCS615-based talos evk SMARC platform.

Signed-off-by Sudarshan Shetty <[email protected]>

---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

Documentation/devicetree/bindings/arm/qcom.yaml +0 -0

index 03a7d3c92ecd..a5dbe6af68ac 100644
@@ -952,6 +952,12 @@ properties:
           - const: qcom,qcs615
           - const: qcom,sm6150
 

Documentation/devicetree/bindings/arm/qcom.yaml properties: · line 957

Quoted 3 lines

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+      - items:
+          - enum:
+              - qcom,qcs615-iq-615-evk

Should it follow the recent example and be named "qcom,talos-evk" ?

Quoted 10 lines

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+          - const: qcom,qcs615
+          - const: qcom,sm6150
+
       - items:
           - enum:
               - qcom,sa8155p-adp

Signature · 1 line

2.34.1

This adds binding support for the QCS615-based talos evk SMARC platform.

Signed-off-by Sudarshan Shetty <[email protected]>

---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

Documentation/devicetree/bindings/arm/qcom.yaml +0 -0

index 03a7d3c92ecd..a5dbe6af68ac 100644

Quoted 1 line · Sudarshan Shetty

This adds binding support for the QCS615-based talos evk SMARC platform.

Please do not use "This commit/patch/change", but imperative mood. See longer explanation here:
https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94

A nit, subject: drop second/last, redundant "bindings". The "dt-bindings" prefix is already stating that these are bindings. See also:
https://elixir.bootlin.com/linux/v6.17-rc3/source/Documentation/devicetree/bindings/submitting-patches.rst#L18

So simple patch and so many trivial mistakes which are already covered in documentation. Did you read the docs?

Quoted 14 lines

Signed-off-by Sudarshan Shetty <[email protected]>

---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

Documentation/devicetree/bindings/arm/qcom.yaml +0 -0

index 03a7d3c92ecd..a5dbe6af68ac 100644
@@ -952,6 +952,12 @@ properties:
           - const: qcom,qcs615
           - const: qcom,sm6150
 

Documentation/devicetree/bindings/arm/qcom.yaml properties: · line 957

Quoted 3 lines

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+      - items:
+          - enum:
+              - qcom,qcs615-iq-615-evk

That's enum with previous entry.

Documentation/devicetree/bindings/arm/qcom.yaml properties: · line 963

Quoted 7 lines

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+          - const: qcom,qcs615
+          - const: qcom,sm6150
+
       - items:
           - enum:
               - qcom,sa8155p-adp

Best regards,
Krzysztof

This adds binding support for the QCS615-based talos evk SMARC platform.

Signed-off-by Sudarshan Shetty <[email protected]>

---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

Documentation/devicetree/bindings/arm/qcom.yaml +0 -0

index 03a7d3c92ecd..a5dbe6af68ac 100644

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+          - const: qcom,qcs615
+          - const: qcom,sm6150
+
       - items:
           - enum:
               - qcom,sa8155p-adp

Signature · 1 line

2.34.1

Quoted 15 lines · Sudarshan Shetty

This adds binding support for the QCS615-based talos evk SMARC platform.

Signed-off-by Sudarshan Shetty <[email protected]>

---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

Documentation/devicetree/bindings/arm/qcom.yaml +0 -0

index 03a7d3c92ecd..a5dbe6af68ac 100644
@@ -952,6 +952,12 @@ properties:
           - const: qcom,qcs615
           - const: qcom,sm6150
 

Documentation/devicetree/bindings/arm/qcom.yaml properties: · line 957

Quoted 3 lines

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+      - items:
+          - enum:
+              - qcom,qcs615-iq-615-evk

Can't we make that qcom,talos-evk?

Regards,
Bjorn

Quoted 9 lines

Documentation/devicetree/bindings/arm/qcom.yaml +3 -0

+          - const: qcom,qcs615
+          - const: qcom,sm6150
+
       - items:
           - enum:
               - qcom,sa8155p-adp

Signature · 1 line

2.34.1

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the talos-evk-som and the talos-evk carrier board.

The talos-evk-som is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

QCS615 talos-evk uses a Quectel AF68E WiFi/BT module (PCIe for WiFi and UART for Bluetooth), which is different from the RIDE platform. Plan to enable these in a follow-up patch series.

Signed-off-by Sudarshan Shetty <[email protected]>

---
Changes in v2:
- Rename compatible to "qcom,talos-evk" (suggested by Dmitry/Bjorn)
- Merge enum entry with existing qcs615-ride block (suggested by Krzysztof)
- Fix subject and commit message to use imperative mood

 arch/arm64/boot/dts/qcom/Makefile           |   1 +
 arch/arm64/boot/dts/qcom/talos-evk-som.dtsi | 406 ++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts      |  42 ++
 3 files changed, 449 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +8 -0

+
+	vreg_v3p3_can: regulator-v3p3-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v3p3-can";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;

(quoted diff) +2 -0

+};
+

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +17 -0

+
+&tlmm {
+	pcie_default_state: pcie-default-state {
+		clkreq-pins {
+			pins = "gpio90";
+			function = "pcie_clk_req";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-pins {
+			pins = "gpio101";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +41 -0

+	pinctrl-0 = <&sdc1_state_on>;
+	pinctrl-1 = <&sdc1_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	bus-width = <8>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	vmmc-supply = <&vreg_l17a>;
+	vqmmc-supply = <&vreg_s4a>;
+
+	non-removable;
+	no-sd;
+	no-sdio;
+
+	status = "okay";
+};
+
+&spi6 {
+	status = "okay";
+
+	mcp2515@0 {
+		compatible = "microchip,mcp2515";
+		reg = <0>;
+		clock-frequency = <20000000>;
+		interrupts-extended = <&tlmm 87 IRQ_TYPE_LEVEL_LOW>;
+		spi-max-frequency = <10000000>;
+		vdd-supply = <&vreg_v3p3_can>;
+		xceiver-supply = <&vreg_v5p0_can>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +6 -0

+};
+
+&usb_hsphy_2 {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +22 -0

+};
+
+&ufs_mem_hc {
+	reset-gpios = <&tlmm 123 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l17a>;
+	vcc-max-microamp = <600000>;
+	vccq2-supply = <&vreg_s4a>;
+	vccq2-max-microamp = <600000>;
+
+	status = "okay";
+};
+
+&ufs_mem_phy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+
+	status = "okay";
+};
+
+&venus {
+	status = "okay";
+};

Quoted 68 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the talos-evk-som and the talos-evk carrier board.

The talos-evk-som is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

QCS615 talos-evk uses a Quectel AF68E WiFi/BT module (PCIe for WiFi and UART for Bluetooth), which is different from the RIDE platform. Plan to enable these in a follow-up patch series.

Signed-off-by Sudarshan Shetty <[email protected]>

---
Changes in v2:
- Rename compatible to "qcom,talos-evk" (suggested by Dmitry/Bjorn)
- Merge enum entry with existing qcs615-ride block (suggested by Krzysztof)
- Fix subject and commit message to use imperative mood

 arch/arm64/boot/dts/qcom/Makefile           |   1 +
 arch/arm64/boot/dts/qcom/talos-evk-som.dtsi | 406 ++++++++++++++++++++
 arch/arm64/boot/dts/qcom/talos-evk.dts      |  42 ++
 3 files changed, 449 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/talos-evk.dts

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +13 -0

+
+	vreg_v3p3_can: regulator-v3p3-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v3p3-can";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vreg_v5p0_can: regulator-v5p0-can {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg-v5p0-can";

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi line 61

Quoted 5 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +5 -0

+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};

Is there a way to control those regulators or are they always enabled by the hardware?

Quoted 3 lines

(quoted diff) +2 -0

+};
+

[...]

Quoted 21 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +21 -0

+
+&tlmm {
+	pcie_default_state: pcie-default-state {
+		clkreq-pins {
+			pins = "gpio90";
+			function = "pcie_clk_req";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-pins {
+			pins = "gpio101";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+
+		wake-pins {
+			pins = "gpio100";
+			function = "gpio";
+			drive-strength = <2>;

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi line 310

Quoted 6 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +6 -0

+			bias-pull-up;
+		};
+	};
+};
+
+&sdhc_1 {

tlmm > sdhc_1

Quoted 46 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +45 -0

+	pinctrl-0 = <&sdc1_state_on>;
+	pinctrl-1 = <&sdc1_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	bus-width = <8>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	vmmc-supply = <&vreg_l17a>;
+	vqmmc-supply = <&vreg_s4a>;
+
+	non-removable;
+	no-sd;
+	no-sdio;
+
+	status = "okay";
+};
+
+&spi6 {
+	status = "okay";
+
+	mcp2515@0 {
+		compatible = "microchip,mcp2515";
+		reg = <0>;
+		clock-frequency = <20000000>;
+		interrupts-extended = <&tlmm 87 IRQ_TYPE_LEVEL_LOW>;
+		spi-max-frequency = <10000000>;
+		vdd-supply = <&vreg_v3p3_can>;
+		xceiver-supply = <&vreg_v5p0_can>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;
+
+	status = "okay";
+};
+

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi line 254

Quoted 6 lines

+&usb_qmpphy {

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +5 -0

+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+
+	status = "okay";
+};

Please keep all the nodes sorted.

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi line 368

Quoted 8 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +7 -0

+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "host";

Is it really host-only?

Quoted 11 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +10 -0

+};
+
+&usb_hsphy_2 {
+	vdd-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+	vdda-phy-dpdm-supply = <&vreg_l13a>;
+
+	status = "okay";
+};
+

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi line 384

Quoted 6 lines

+&usb_2 {

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +5 -0

+	status = "okay";
+};
+
+&usb_2_dwc3 {
+	dr_mode = "host";

Is it really host-only?

Quoted 23 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +22 -0

+};
+
+&ufs_mem_hc {
+	reset-gpios = <&tlmm 123 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l17a>;
+	vcc-max-microamp = <600000>;
+	vccq2-supply = <&vreg_s4a>;
+	vccq2-max-microamp = <600000>;
+
+	status = "okay";
+};
+
+&ufs_mem_phy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+
+	status = "okay";
+};
+
+&venus {
+	status = "okay";
+};

Quoted 50 lines · Dmitry Baryshkov

Quoted 48 lines · Sudarshan Shetty

Introduce the device tree support for the QCS615-based talos-evk platform, which follows the SMARC (Smart Mobility ARChitecture) standard. The platform is composed of two main hardware
components: the talos-evk-som and the talos-evk carrier board.

The talos-evk-som is a compact System on Module that integrates the QCS615 SoC, PMIC, and essential GPIO connectivity. It follows the SMARC standard, which defines a modular form factor allowing the SoM to be paired with different carrier boards for varied applications.

The talos-evk is one such carrier board, designed for evaluation and development purposes. It provides additional peripherals such as UART, USB, and other interfaces to enable rapid prototyping and hardware bring-up.

This initial device tree provides the basic configuration needed to boot the platform to a UART shell. Further patches will extend support for additional peripherals and subsystems.

The initial device tree includes basic support for:

- CPU and memory

- UART

- GPIOs

- Regulators

- PMIC

- Early console

- AT24MAC602 EEPROM

- MCP2515 SPI to CAN

QCS615 talos-evk uses a Quectel AF68E WiFi/BT module (PCIe for WiFi and UART for Bluetooth), which is different from the RIDE platform. Plan to enable these in a follow-up patch series.

Signed-off-by Sudarshan Shetty <[email protected]>

---
Changes in v2:
- Rename compatible to "qcom,talos-evk" (suggested by Dmitry/Bjorn)
- Merge enum entry with existing qcs615-ride block (suggested by Krzysztof)
- Fix subject and commit message to use imperative mood

Quoted 9 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi line 368

Quoted 7 lines

arch/arm64/boot/dts/qcom/talos-evk-som.dtsi new file +7 -0

+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "host";

Is it really host-only?

The USB1 port supports both device and host modes, and the ID pin is available on the hardware. By default, it operates in device mode, and switching to host mode requires a hardware switch on the SoM. In the current patch, I’ve set dr_mode = "host" for host operation.

I plan to add proper role-switch logic (using the ID pin) in the next patch version, so the controller can dynamically switch between device and host modes.

Add binding support for the QCS615-based Talos EVK SMARC platform.

Signed-off-by Sudarshan Shetty <[email protected]>

---
 Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
 1 file changed, 1 insertion(+)

Documentation/devicetree/bindings/arm/qcom.yaml +1 -0

index 0a3222d6f368..a323be3d2ba2 100644
@@ -862,6 +862,7 @@ properties:
       - items:
           - enum:
               - qcom,qcs615-ride
+              - qcom,talos-evk
           - const: qcom,qcs615
           - const: qcom,sm6150
 

Signature · 1 line

2.34.1