net/mlx5: fix IPv6 DSCP offset in NT HWS API

PATCH Superseded Gavin Li 4 participants 7 messages Sep 30, 2025 – Nov 16, 2025 Network drivers

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Gavin Li

author

2025-09-30 07:30 UTC #0 lore raw

PATCH 1/1 net/mlx5: fix IPv6 DSCP offset in NT HWS API

The RTE action process in the HWS non-template API differs from the process in SWS. The bit shift handling for IPv6 DSCP was not handled in HWS, resulting in incorrect data in the field.

To resolve this, bit shift handling should be added to HWS.

Fixes ec1e7a5ceb69 ("net/mlx5: update IPv6 traffic class modification")

Cc [email protected]

Signed-off-by Gavin Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.h    | 5 +++++
 drivers/net/mlx5/mlx5_flow_dv.c | 6 ------
 drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++
 3 files changed, 10 insertions(+), 6 deletions(-)

drivers/net/mlx5/mlx5_flow.h +5 -0

index ff61706054..6ec853f018 100644
@@ -3680,6 +3680,11 @@ void
 mlx5_indirect_list_handles_release(struct rte_eth_dev *dev);
 
 bool mlx5_flow_is_steering_disabled(void);
+static inline bool
+mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv)
+{
+	return priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;
+}
 
 #ifdef HAVE_MLX5_HWS_SUPPORT

drivers/net/mlx5/mlx5_flow_dv.c +0 -6

index bcce1597e2..517a5e530d 100644
@@ -1638,12 +1638,6 @@ mlx5_modify_flex_item(const struct rte_eth_dev *dev,
 	}
 }
 
-static inline bool
-mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv)
-{
-	return priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;
-}
-
 void
 mlx5_flow_field_id_to_modify_info
 		(const struct rte_flow_field_data *data,

drivers/net/mlx5/mlx5_flow_hw.c +5 -0

index 9a0aa1827e..628a47f2ce 100644
@@ -1613,6 +1613,11 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev,
 			value = *(const uint8_t *)item.spec << 24;
 			value = rte_cpu_to_be_32(value);
 			item.spec = &value;
+		} else if (conf->dst.field == RTE_FLOW_FIELD_IPV6_DSCP &&
+			   !(mask[0] & MLX5_IPV6_HDR_ECN_MASK) &&
+			   mlx5_dv_modify_ipv6_traffic_class_supported(dev->data->dev_private)) {
+			value = *(const unaligned_uint32_t *)item.spec << MLX5_IPV6_HDR_DSCP_SHIFT;
+			item.spec = &value;
 		}
 	} else {
 		type = conf->operation == RTE_FLOW_MODIFY_SET ?

Signature · 1 line

2.34.1

Bing Zhao

Acked-by on v1 1/1

2025-11-12 08:58 UTC #1 lore raw

Hi,

Quoted 78 lines

-----Original Message-----
From: Minggang(Gavin) Li <[email protected]>
Sent: Tuesday, September 30, 2025 3:28 PM
To: Matan Azrad <[email protected]>; Slava Ovsiienko <[email protected]>; Ori Kam <[email protected]>; NBU-Contact-Thomas Monjalon (EXTERNAL) <[email protected]>; Dariusz Sosnowski <[email protected]>; Bing Zhao <[email protected]>; Suanming Mou <[email protected]>; Minggang(Gavin) Li <[email protected]>
Cc: [email protected]; Raslan Darawsheh <[email protected]>; [email protected]
Subject: [PATCH] net/mlx5: fix IPv6 DSCP offset in NT HWS API
The RTE action process in the HWS non-template API differs from the process in SWS. The bit shift handling for IPv6 DSCP was not handled in HWS, resulting in incorrect data in the field.
To resolve this, bit shift handling should be added to HWS.
Fixes ec1e7a5ceb69 ("net/mlx5: update IPv6 traffic class modification")
Cc [email protected]
Signed-off-by Gavin Li <[email protected]>
---
 drivers/net/mlx5/mlx5_flow.h    | 5 +++++
 drivers/net/mlx5/mlx5_flow_dv.c | 6 ------
drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++
 3 files changed, 10 insertions(+), 6 deletions(-)
drivers/net/mlx5/mlx5_flow.h +3 -0
index ff61706054..6ec853f018 100644
@@ -3680,6 +3680,11 @@ void
 mlx5_indirect_list_handles_release(struct rte_eth_dev *dev);
 
 bool mlx5_flow_is_steering_disabled(void);
+static inline bool
+mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv) {
+	return priv->sh->phdev->config.ipv6_tc_fallback ==
 MLX5_IPV6_TC_OK; }
 
 #ifdef HAVE_MLX5_HWS_SUPPORT
(quoted diff) +0 -0
b/drivers/net/mlx5/mlx5_flow_dv.c index bcce1597e2..517a5e530d 100644
drivers/net/mlx5/mlx5_flow_dv.c +0 -5
@@ -1638,12 +1638,6 @@ mlx5_modify_flex_item(const struct rte_eth_dev
 *dev,
 	}
 }
 
-static inline bool
-mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv) -{
-	return priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;
-}
-
 void
 mlx5_flow_field_id_to_modify_info
 		(const struct rte_flow_field_data *data, diff --git
a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 9a0aa1827e..628a47f2ce 100644
drivers/net/mlx5/mlx5_flow_hw.c +5 -0
@@ -1613,6 +1613,11 @@ flow_hw_modify_field_compile(struct rte_eth_dev
 *dev,
 			value = *(const uint8_t *)item.spec << 24;
 			value = rte_cpu_to_be_32(value);
 			item.spec = &value;
+		} else if (conf->dst.field == RTE_FLOW_FIELD_IPV6_DSCP &&
+			   !(mask[0] & MLX5_IPV6_HDR_ECN_MASK) &&
+			   mlx5_dv_modify_ipv6_traffic_class_supported(dev-
 >data->dev_private)) {
+			value = *(const unaligned_uint32_t *)item.spec <<
 MLX5_IPV6_HDR_DSCP_SHIFT;
+			item.spec = &value;
drivers/net/mlx5/mlx5_flow_hw.c +0 -1
 		}
 	} else {
 		type = conf->operation == RTE_FLOW_MODIFY_SET ?
--

Quoted 1 line

2.34.1

Maybe the title can be changed to non-template API directly instead of NT HWS?

Acked-by Bing Zhao <[email protected]>

Thomas Monjalon

2025-11-12 09:10 UTC #2 lore raw

12/11/2025 09:58, Bing Zhao:

Quoted 1 line

Maybe the title can be changed to non-template API directly instead of NT HWS?

No, the correct name is synchronous flow API with hardware steering. You can shorten it as "HWS sync API".

Minggang(Gavin) Li

author

2025-11-12 12:47 UTC #3 lore raw

Quoted 13 lines

-----Original Message-----
From: Thomas Monjalon <[email protected]>
Sent: Wednesday, November 12, 2025 5:10 PM
To: Minggang(Gavin) Li <[email protected]>; Bing Zhao <[email protected]>
Cc: Matan Azrad <[email protected]>; Slava Ovsiienko <[email protected]>; Ori Kam <[email protected]>; Dariusz Sosnowski <[email protected]>; Suanming Mou <[email protected]>; [email protected]; Raslan Darawsheh <[email protected]>; [email protected]; Maayan Kashani <[email protected]>
Subject: Re: [PATCH] net/mlx5: fix IPv6 DSCP offset in NT HWS API

Quoted 6 lines

12/11/2025 09:58, Bing Zhao:
Quoted 1 line
Maybe the title can be changed to non-template API directly instead of NT
HWS?
No, the correct name is synchronous flow API with hardware steering. You can shorten it as "HWS sync API".

ACK

Quoted 2 lines

Gavin Li

author

2025-11-12 13:02 UTC #4 lore raw

PATCH v2 1/1 net/mlx5: fix IPv6 DSCP offset in HWS sync API

In reply to Gavin Li

The RTE action process in synchronous flow API with hardware steering differs from the process in SWS. The bit shift handling for IPv6 DSCP was not handled in HWS, resulting in incorrect data in the field.

To resolve this, bit shift handling should be added to HWS.

Fixes ec1e7a5ceb69 ("net/mlx5: update IPv6 traffic class modification")

Cc [email protected]

Signed-off-by Gavin Li <[email protected]>

Acked-by Bing Zhao <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.h    | 5 +++++
 drivers/net/mlx5/mlx5_flow_dv.c | 6 ------
 drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++
 3 files changed, 10 insertions(+), 6 deletions(-)

drivers/net/mlx5/mlx5_flow.h +5 -0

index e8b298dd1d..fafcdccbed 100644
@@ -3715,6 +3715,11 @@ void
 mlx5_indirect_list_handles_release(struct rte_eth_dev *dev);
 
 bool mlx5_flow_is_steering_disabled(void);
+static inline bool
+mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv)
+{
+	return priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;
+}
 
 #ifdef HAVE_MLX5_HWS_SUPPORT

drivers/net/mlx5/mlx5_flow_dv.c +0 -6

index 95ca57e8c4..83046418c4 100644
@@ -1638,12 +1638,6 @@ mlx5_modify_flex_item(const struct rte_eth_dev *dev,
 	}
 }
 
-static inline bool
-mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv)
-{
-	return priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;
-}
-
 void
 mlx5_flow_field_id_to_modify_info
 		(const struct rte_flow_field_data *data,

drivers/net/mlx5/mlx5_flow_hw.c +5 -0

index 208f50fbfd..d3d2272338 100644
@@ -1629,6 +1629,11 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev,
 			value = *(const uint8_t *)item.spec << 24;
 			value = rte_cpu_to_be_32(value);
 			item.spec = &value;
+		} else if (conf->dst.field == RTE_FLOW_FIELD_IPV6_DSCP &&
+			   !(mask[0] & MLX5_IPV6_HDR_ECN_MASK) &&
+			   mlx5_dv_modify_ipv6_traffic_class_supported(dev->data->dev_private)) {
+			value = *(const unaligned_uint32_t *)item.spec << MLX5_IPV6_HDR_DSCP_SHIFT;
+			item.spec = &value;
 		}
 	} else {
 		type = conf->operation == RTE_FLOW_MODIFY_SET ?

Signature · 1 line

2.34.1

Gavin Li

author

2025-11-12 13:43 UTC #5 lore raw

PATCH v3 1/1 net/mlx5: fix IPv6 DSCP offset in HWS sync API

The processing of field IPv6 DSCP via the synchronous flow API is different between software and hardware steering engines(HWS). The bit shift handling for IPv6 DSCP was not handled in HWS, resulting in incorrect data in the field.

To resolve this, bit shift handling should be added to HWS.

Fixes ec1e7a5ceb69 ("net/mlx5: update IPv6 traffic class modification")

Cc [email protected]

Signed-off-by Gavin Li <[email protected]>

Acked-by Bing Zhao <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.h    | 7 +++++++
 drivers/net/mlx5/mlx5_flow_dv.c | 6 ------
 drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++
 3 files changed, 12 insertions(+), 6 deletions(-)

drivers/net/mlx5/mlx5_flow.h +7 -0

index e8b298dd1d..2bf74b47b9 100644
@@ -3711,6 +3711,13 @@ flow_hw_get_ipv6_route_ext_mod_id_from_ctx(void *dr_ctx, uint8_t idx)
 #endif
 	return 0;
 }
+
+static inline bool
+mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv)
+{
+	return priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;
+}
+
 void
 mlx5_indirect_list_handles_release(struct rte_eth_dev *dev);

drivers/net/mlx5/mlx5_flow_dv.c +0 -6

index 95ca57e8c4..83046418c4 100644
@@ -1638,12 +1638,6 @@ mlx5_modify_flex_item(const struct rte_eth_dev *dev,
 	}
 }
 
-static inline bool
-mlx5_dv_modify_ipv6_traffic_class_supported(struct mlx5_priv *priv)
-{
-	return priv->sh->phdev->config.ipv6_tc_fallback == MLX5_IPV6_TC_OK;
-}
-
 void
 mlx5_flow_field_id_to_modify_info
 		(const struct rte_flow_field_data *data,

drivers/net/mlx5/mlx5_flow_hw.c +5 -0

index 208f50fbfd..d3d2272338 100644
@@ -1629,6 +1629,11 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev,
 			value = *(const uint8_t *)item.spec << 24;
 			value = rte_cpu_to_be_32(value);
 			item.spec = &value;
+		} else if (conf->dst.field == RTE_FLOW_FIELD_IPV6_DSCP &&
+			   !(mask[0] & MLX5_IPV6_HDR_ECN_MASK) &&
+			   mlx5_dv_modify_ipv6_traffic_class_supported(dev->data->dev_private)) {
+			value = *(const unaligned_uint32_t *)item.spec << MLX5_IPV6_HDR_DSCP_SHIFT;
+			item.spec = &value;
 		}
 	} else {
 		type = conf->operation == RTE_FLOW_MODIFY_SET ?

Signature · 1 line

2.34.1

Raslan Darawsheh

2025-11-16 15:34 UTC #6 lore raw

Re: [PATCH V3] net/mlx5: fix IPv6 DSCP offset in HWS sync API

Hi,

Quoted 11 lines · Gavin Li

The processing of field IPv6 DSCP via the synchronous flow API is different between software and hardware steering engines(HWS). The bit shift handling for IPv6 DSCP was not handled in HWS, resulting in incorrect data in the field.
To resolve this, bit shift handling should be added to HWS.
Fixes ec1e7a5ceb69 ("net/mlx5: update IPv6 traffic class modification")
Cc [email protected]
Signed-off-by Gavin Li <[email protected]>
Acked-by Bing Zhao <[email protected]>

Patch applied to next-net-mlx,

Kindest regards
Raslan Darawsheh