net/mlx5: skip Rx control flow tables in isolated mode

index 83a4adc971..a33a119b99 100644
@@ -3056,6 +3056,8 @@ struct mlx5_flow_hw_ctrl_nic {
 #define MLX5_CTRL_VLAN_FILTER    (RTE_BIT32(6))
 
 int mlx5_flow_hw_ctrl_flows(struct rte_eth_dev *dev, uint32_t flags);
+int mlx5_flow_hw_create_ctrl_rx_tables(struct rte_eth_dev *dev);
+void mlx5_flow_hw_cleanup_ctrl_rx_tables(struct rte_eth_dev *dev);
 
 /** Create a control flow rule for matching unicast DMAC with VLAN (Verbs and DV). */
 int mlx5_legacy_dmac_flow_create(struct rte_eth_dev *dev, const struct rte_ether_addr *addr);

index e0f79932a5..e34659abe7 100644
@@ -11257,8 +11257,8 @@ flow_hw_create_vlan(struct rte_eth_dev *dev)
 	return 0;
 }
 
-static void
-flow_hw_cleanup_ctrl_rx_tables(struct rte_eth_dev *dev)
+void
+mlx5_flow_hw_cleanup_ctrl_rx_tables(struct rte_eth_dev *dev)
 {
 	struct mlx5_priv *priv = dev->data->dev_private;
 	unsigned int i;

@@ -11543,8 +11543,8 @@ flow_hw_create_ctrl_rx_pattern_template
 	return flow_hw_pattern_template_create(dev, &attr, items, NULL);
 }
 
-static int
-flow_hw_create_ctrl_rx_tables(struct rte_eth_dev *dev)
+int
+mlx5_flow_hw_create_ctrl_rx_tables(struct rte_eth_dev *dev)
 {
 	struct mlx5_priv *priv = dev->data->dev_private;
 	unsigned int i;

@@ -11580,8 +11580,6 @@ flow_hw_create_ctrl_rx_tables(struct rte_eth_dev *dev)
 	return 0;
 err:
 	ret = rte_errno;
-	flow_hw_cleanup_ctrl_rx_tables(dev);
-	rte_errno = ret;
 	return -ret;
 }
 

@@ -11780,7 +11778,6 @@ __flow_hw_resource_release(struct rte_eth_dev *dev, bool ctx_close)
 	flow_hw_cleanup_ctrl_fdb_tables(dev);
 	flow_hw_cleanup_ctrl_nic_tables(dev);
 	flow_hw_cleanup_tx_repr_tagging(dev);
-	flow_hw_cleanup_ctrl_rx_tables(dev);
 	flow_hw_action_template_drop_release(dev);
 	grp = LIST_FIRST(&priv->flow_hw_grp);
 	while (grp) {

@@ -12138,12 +12135,6 @@ __flow_hw_configure(struct rte_eth_dev *dev,
 	ret = flow_hw_action_template_drop_init(dev, error);
 	if (ret)
 		goto err;
-	ret = flow_hw_create_ctrl_rx_tables(dev);
-	if (ret) {
-		rte_flow_error_set(error, -ret, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
-				   "Failed to set up Rx control flow templates");
-		goto err;
-	}
 	/* Initialize quotas */
 	if (port_attr->nb_quotas || (host_priv && host_priv->quota_ctx.devx_obj)) {
 		ret = mlx5_flow_quota_init(dev, port_attr->nb_quotas);

index 996c1eb6ac..23b093ca77 100644
@@ -1660,6 +1660,12 @@ mlx5_traffic_enable_hws(struct rte_eth_dev *dev)
 			goto error;
 	if (priv->isolated)
 		return 0;
+	ret = mlx5_flow_hw_create_ctrl_rx_tables(dev);
+	if (ret) {
+		DRV_LOG(ERR, "Failed to set up Rx control flow templates for port %u, %d",
+			dev->data->port_id, -ret);
+		goto error;
+	}
 	if (dev->data->promiscuous)
 		flags |= MLX5_CTRL_PROMISCUOUS;
 	if (dev->data->all_multicast)

@@ -1673,6 +1679,7 @@ mlx5_traffic_enable_hws(struct rte_eth_dev *dev)
 error:
 	ret = rte_errno;
 	mlx5_flow_hw_flush_ctrl_flows(dev);
+	mlx5_flow_hw_cleanup_ctrl_rx_tables(dev);
 	rte_errno = ret;
 	return -rte_errno;
 }

@@ -1913,8 +1920,13 @@ mlx5_traffic_disable(struct rte_eth_dev *dev)
 #ifdef HAVE_MLX5_HWS_SUPPORT
 	struct mlx5_priv *priv = dev->data->dev_private;
 
-	if (priv->sh->config.dv_flow_en == 2)
+	if (priv->sh->config.dv_flow_en == 2) {
+		/* Device started flag was cleared before, this is used to derefer the Rx queues. */
+		priv->hws_rule_flushing = true;
 		mlx5_flow_hw_flush_ctrl_flows(dev);
+		mlx5_flow_hw_cleanup_ctrl_rx_tables(dev);
+		priv->hws_rule_flushing = false;
+	}
 	else
 #endif
 		mlx5_traffic_disable_legacy(dev);