dt-bindings: usb: Add Socionext Uniphier DWC3 controller

PATCH Superseded Rob Herring (Arm) 2 participants 4 messages Dec 15, 2025 – Dec 18, 2025

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Device tree bindings USB Arm/uniphier architecture

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Rob Herring (Arm)

author maintainer

2025-12-15 21:25 UTC #0 lore raw

PATCH 1/1 dt-bindings: usb: Add Socionext Uniphier DWC3 controller

The Socionext Uniphier DWC3 controller binding is already in use, but undocumented. It's a straight-forward binding similar to other DWC3 bindings.

Signed-off-by Rob Herring (Arm) <[email protected]>

---
 .../bindings/usb/socionext,uniphier-dwc3.yaml | 89 +++++++++++++++++++
 1 file changed, 89 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +89 -0

new file mode 100644
index 000000000000..892ae3458c1b
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller
+
+maintainers:
+  - Kunihiko Hayashi <[email protected]>
+  - Masami Hiramatsu <[email protected]>
+
+select:
+  properties:
+    compatible:
+      contains:
+        const: socionext,uniphier-dwc3
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - const: socionext,uniphier-dwc3
+      - const: snps,dwc3
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    minItems: 1
+    items:
+      - description: Host or single combined interrupt
+      - description: Peripheral interrupt
+
+  interrupt-names:
+    minItems: 1
+    items:
+      - enum:
+          - dwc_usb3
+          - host
+      - const: peripheral
+
+  clocks:
+    maxItems: 3
+
+  clock-names:
+    items:
+      - const: ref
+      - const: bus_early
+      - const: suspend
+
+  phys:
+    description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed PHYs
+    minItems: 2
+    maxItems: 6
+
+  resets:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - phys
+
+unevaluatedProperties: false
+
+allOf:
+  - $ref: snps,dwc3.yaml#
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    usb@65a00000 {
+        compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+        reg = <0x65a00000 0xcd00>;
+        interrupt-names = "dwc_usb3";
+        interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
+        clock-names = "ref", "bus_early", "suspend";
+        clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+        resets = <&usb0_rst 15>;
+        phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
+               <&usb0_ssphy0>, <&usb0_ssphy1>;
+        dr_mode = "host";
+    };

Signature · 1 line

2.51.0

Kunihiko Hayashi

maintainer

2025-12-16 01:21 UTC #1 lore raw

Hi Rob,

Quoted 3 lines · Rob Herring (Arm)

The Socionext Uniphier DWC3 controller binding is already in use, but undocumented. It's a straight-forward binding similar to other DWC3 bindings.

After being pointed out by Krzysztof at OSSJapan, I've checked the bindings and was preparing some additions or fixes to resolve the warning.

It's almost the same as my proposal, however, I add a little.

Quoted 48 lines

Signed-off-by Rob Herring (Arm) <[email protected]>
---
  .../bindings/usb/socionext,uniphier-dwc3.yaml | 89 +++++++++++++++++++
  1 file changed, 89 insertions(+)
create mode 100644
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml b/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file mode 100644
index 000000000000..892ae3458c1b
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +32 -0
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller
+
+maintainers:
+  - Kunihiko Hayashi <[email protected]>
+  - Masami Hiramatsu <[email protected]>
+
+select:
+  properties:
+    compatible:
+      contains:
+        const: socionext,uniphier-dwc3
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - const: socionext,uniphier-dwc3
+      - const: snps,dwc3
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    minItems: 1
+    items:

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml line 42

Quoted 10 lines

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +10 -0

+      - description: Host or single combined interrupt
+      - description: Peripheral interrupt
+
+  interrupt-names:
+    minItems: 1
+    items:
+      - enum:
+          - dwc_usb3
+          - host
+      - const: peripheral

There's no problem, but how about the following description following snps,dwc3.yaml?

interrupt-names:
oneOf:
- const: dwc_usb3
- items:
enum: [host, peripheral]

Quoted 4 lines

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +4 -0
+
+  clocks:
+    maxItems: 3
+

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml line 56

Quoted 10 lines

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +10 -0

+  clock-names:
+    items:
+      - const: ref
+      - const: bus_early
+      - const: suspend
+
+  phys:
+    description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed PHYs
+    minItems: 2
+    maxItems: 6

Since Pro4 only has one PHY, so:
minItems: 1

Quoted 23 lines

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +23 -0

+
+  resets:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - phys
+
+unevaluatedProperties: false
+
+allOf:
+  - $ref: snps,dwc3.yaml#
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    usb@65a00000 {
+        compatible = "socionext,uniphier-dwc3", "snps,dwc3";

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml line 89

Quoted 10 lines

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +10 -0

+        reg = <0x65a00000 0xcd00>;
+        interrupt-names = "dwc_usb3";
+        interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
+        clock-names = "ref", "bus_early", "suspend";
+        clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+        resets = <&usb0_rst 15>;
+        phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
+               <&usb0_ssphy0>, <&usb0_ssphy1>;
+        dr_mode = "host";
+    };

Thank you,

Signature · 3 lines

---
Best Regards
Kunihiko Hayashi

Rob Herring

author maintainer

2025-12-16 16:39 UTC #2 lore raw

Quoted 74 lines · Kunihiko Hayashi

Hi Rob,
Quoted 3 lines · Rob Herring (Arm)
The Socionext Uniphier DWC3 controller binding is already in use, but undocumented. It's a straight-forward binding similar to other DWC3 bindings.
After being pointed out by Krzysztof at OSSJapan, I've checked the bindings and was preparing some additions or fixes to resolve the warning.
It's almost the same as my proposal, however, I add a little.
Quoted 48 lines
Signed-off-by Rob Herring (Arm) <[email protected]>
---
  .../bindings/usb/socionext,uniphier-dwc3.yaml | 89 +++++++++++++++++++
  1 file changed, 89 insertions(+)
create mode 100644
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml b/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file mode 100644
index 000000000000..892ae3458c1b
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +32 -0
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller
+
+maintainers:
+  - Kunihiko Hayashi <[email protected]>
+  - Masami Hiramatsu <[email protected]>
+
+select:
+  properties:
+    compatible:
+      contains:
+        const: socionext,uniphier-dwc3
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - const: socionext,uniphier-dwc3
+      - const: snps,dwc3
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    minItems: 1
+    items:
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml line 42
Quoted 10 lines
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +10 -0
+      - description: Host or single combined interrupt
+      - description: Peripheral interrupt
+
+  interrupt-names:
+    minItems: 1
+    items:
+      - enum:
+          - dwc_usb3
+          - host
+      - const: peripheral
There's no problem, but how about the following description following snps,dwc3.yaml?

Quoted 5 lines

interrupt-names:
oneOf:
- const: dwc_usb3
- items:
enum: [host, peripheral]

That allows for 'peripheral, host' or just 'peripheral'. Mine would seemingly allow 'dwc_usb3, host', but snps,dwc3.yaml will prevent that.

Quoted 10 lines

Quoted 10 lines
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +9 -0
+
+  clocks:
+    maxItems: 3
+
+  clock-names:
+    items:
+      - const: ref
+      - const: bus_early
+      - const: suspend

Quoted 8 lines

Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml line 56
Quoted 5 lines
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +5 -0
+
+  phys:
+    description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed PHYs
+    minItems: 2
+    maxItems: 6
Since Pro4 only has one PHY, so:
minItems: 1

Ah, I only checked arm64. Will fix.

If there's other arm32 warnings, I'm not looking at those. So fixes appreciated there.

Rob

Kunihiko Hayashi

maintainer

2025-12-18 09:52 UTC #3 lore raw

Quoted 83 lines · Rob Herring

Quoted 75 lines · Kunihiko Hayashi
Hi Rob,
Quoted 3 lines · Rob Herring (Arm)
The Socionext Uniphier DWC3 controller binding is already in use, but undocumented. It's a straight-forward binding similar to other DWC3 bindings.
After being pointed out by Krzysztof at OSSJapan, I've checked the bindings
and was preparing some additions or fixes to resolve the warning.
It's almost the same as my proposal, however, I add a little.
Quoted 48 lines
Signed-off-by Rob Herring (Arm) <[email protected]>
---
   .../bindings/usb/socionext,uniphier-dwc3.yaml | 89 +++++++++++++++++++
   1 file changed, 89 insertions(+)
create mode 100644
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml b/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file mode 100644
index 000000000000..892ae3458c1b
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +32 -0
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller
+
+maintainers:
+  - Kunihiko Hayashi <[email protected]>
+  - Masami Hiramatsu <[email protected]>
+
+select:
+  properties:
+    compatible:
+      contains:
+        const: socionext,uniphier-dwc3
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - const: socionext,uniphier-dwc3
+      - const: snps,dwc3
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    minItems: 1
+    items:
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml line 42
Quoted 10 lines
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +10 -0
+      - description: Host or single combined interrupt
+      - description: Peripheral interrupt
+
+  interrupt-names:
+    minItems: 1
+    items:
+      - enum:
+          - dwc_usb3
+          - host
+      - const: peripheral
There's no problem, but how about the following description following snps,dwc3.yaml?
Quoted 5 lines
interrupt-names:
oneOf:
- const: dwc_usb3
- items:
enum: [host, peripheral]

Quoted 3 lines

That allows for 'peripheral, host' or just 'peripheral'. Mine would seemingly allow 'dwc_usb3, host', but snps,dwc3.yaml will prevent that.

I see. The property combinations are complex, so I'll follow your suggestion from the currnet .dts files.

Quoted 20 lines

Quoted 11 lines
Quoted 11 lines
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +10 -0
+
+  clocks:
+    maxItems: 3
+
+  clock-names:
+    items:
+      - const: ref
+      - const: bus_early
+      - const: suspend
+
Quoted 8 lines
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml line 56
Quoted 5 lines
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +2 -0
+  phys:
+    description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed
PHYs
Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml new file +2 -0
+    minItems: 2
+    maxItems: 6
Since Pro4 only has one PHY, so:
minItems: 1

Quoted 2 lines

Ah, I only checked arm64. Will fix> If there's other arm32 warnings, I'm not looking at those. So fixes appreciated there.

Yes, I'll address the arm32 warnings.

Thank you,

---
Best Regards
Kunihiko Hayashi