KVM: arm64: nv: Return correct RES0 bits for FGT registers
PATCH 1/1 KVM: arm64: nv: Return correct RES0 bits for FGT registers
From: "Zenghui Yu (Huawei)" <[email protected]>
We had extended the sysreg masking infrastructure to more general registers, instead of restricting it to VNCR-backed registers, since commit a0162020095e ("KVM: arm64: Extend masking facility to arbitrary registers"). Fix kvm_get_sysreg_res0() to reflect this fact.
Note that we're sure that we only deal with FGT registers in kvm_get_sysreg_res0(), the
if (sr < __VNCR_START__)
is actually a never false, which should probably be removed later.
--- arch/arm64/kvm/emulate-nested.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/kvm/emulate-nested.c +1 -1
@@ -2428,7 +2428,7 @@ static u64 kvm_get_sysreg_res0(struct kvm *kvm, enum vcpu_sysreg sr) masks = kvm->arch.sysreg_masks; -return masks->mask[sr - __VNCR_START__].res0; +return masks->mask[sr - __SANITISED_REG_START__].res0; } static bool check_fgt_bit(struct kvm_vcpu *vcpu, enum vcpu_sysreg sr,
Signature · 1 line
2.34.1
Marc Zyngier
maintainerQuoted 7 lines · Zenghui Yu
From: "Zenghui Yu (Huawei)" <[email protected]>
We had extended the sysreg masking infrastructure to more general registers, instead of restricting it to VNCR-backed registers, since commit
a0162020095e("KVM: arm64: Extend masking facility to arbitrary registers"). Fixkvm_get_sysreg_res0()to reflect this fact.
Huh, what a howler! Thanks a lot for spotting this!
Quoted 7 lines
Note that we're sure that we only deal with FGT registers in
kvm_get_sysreg_res0(), theif (sr < __VNCR_START__)is actually a never false, which should probably be removed later.
I think the biggest mistake is to have several places where we perform sysreg index to array index conversions. We should try to unify that.
Quoted 3 lines
Fixes 69c19e047dfe ("KVM: arm64: Add TCR2_EL2 to the sysreg arrays")Signed-off-by Zenghui Yu (Huawei) <[email protected]>
Thanks again,
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.
Quoted 9 lines · Zenghui Yu
We had extended the sysreg masking infrastructure to more general registers, instead of restricting it to VNCR-backed registers, since commit
a0162020095e("KVM: arm64: Extend masking facility to arbitrary registers"). Fixkvm_get_sysreg_res0()to reflect this fact.Note that we're sure that we only deal with FGT registers in
kvm_get_sysreg_res0(), the[...]
Applied to next, thanks!
[1/1] KVM: arm64: nv: Return correct RES0 bits for FGT registers
commit: 2eb80a2eee18762a33aa770d742d64fe47852c7e
Cheers,
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.