Skip to contentSkip to conversation

FAILED: patch "[PATCH] pmdomain: imx8m-blk-ctrl: Remove separate rst and clk mask" failed to apply to 6.1-stable tree

PATCH New [email protected] 2 participants 2 messages Jan 27 – Jan 28

Subsystems (3)
Stable branch Arm i.MX and Layerscape Generic PM domains
lore
Share & tools
lore

[email protected]

author maintainer
#0 lore raw

The patch below does not apply to the 6.1-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.1.y
git checkout FETCH_HEAD
git cherry-pick -x 3de49966499634454fd59e0e6fecd50baab7febd
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026012709-declared-threefold-0e87@gregkh' --subject-prefix 'PATCH 6.1.y' HEAD^..

Possible dependencies:

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 3de49966499634454fd59e0e6fecd50baab7febd Mon Sep 17 00:00:00 2001
From: Ming Qian <[email protected]>
Date: Fri, 5 Dec 2025 09:54:25 +0800
Subject: [PATCH] pmdomain: imx8m-blk-ctrl: Remove separate rst and clk mask
for 8mq vpu

For i.MX8MQ platform, the ADB in the VPUMIX domain has no separate reset and clock enable bits, but is ungated and reset together with the VPUs. So we can't reset G1 or G2 separately, it may led to the system hang. Remove rst_mask and clk_mask of imx8mq_vpu_blk_ctl_domain_data. Let imx8mq_vpu_power_notifier() do really vpu reset.

Fixes 608d7c325e85 ("soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl")
Signed-off-by Ming Qian <[email protected]>
Reviewed-by Benjamin Gaignard <[email protected]>
Reviewed-by Peng Fan <[email protected]>
Reviewed-by Frank Li <[email protected]>
Cc [email protected]
Signed-off-by Ulf Hansson <[email protected]>
drivers/pmdomain/imx/imx8m-blk-ctrl.c +7 -4
index 5c83e5599f1e..74bf4936991d 100644
@@ -846,22 +846,25 @@ static int imx8mq_vpu_power_notifier(struct notifier_block *nb,
 	return NOTIFY_OK;
 }
 
+/*
+ * For i.MX8MQ, the ADB in the VPUMIX domain has no separate reset and clock
+ * enable bits, but is ungated and reset together with the VPUs.
+ * Resetting G1 or G2 separately may led to system hang.
+ * Remove the rst_mask and clk_mask from the domain data of G1 and G2,
+ * Let imx8mq_vpu_power_notifier() do really vpu reset.
+ */
 static const struct imx8m_blk_ctrl_domain_data imx8mq_vpu_blk_ctl_domain_data[] = {
 	[IMX8MQ_VPUBLK_PD_G1] = {
 		.name = "vpublk-g1",
 		.clk_names = (const char *[]){ "g1", },
 		.num_clks = 1,
 		.gpc_name = "g1",
-		.rst_mask = BIT(1),
-		.clk_mask = BIT(1),
 	},
 	[IMX8MQ_VPUBLK_PD_G2] = {
 		.name = "vpublk-g2",
 		.clk_names = (const char *[]){ "g2", },
 		.num_clks = 1,
 		.gpc_name = "g2",
-		.rst_mask = BIT(0),
-		.clk_mask = BIT(0),
 	},
 };
maintainer
#1 lore raw

PATCH 1/1 pmdomain: imx8m-blk-ctrl: Remove separate rst and clk mask for 8mq vpu

From: Ming Qian <[email protected]>

[ Upstream commit 3de49966499634454fd59e0e6fecd50baab7febd ]

For i.MX8MQ platform, the ADB in the VPUMIX domain has no separate reset and clock enable bits, but is ungated and reset together with the VPUs. So we can't reset G1 or G2 separately, it may led to the system hang. Remove rst_mask and clk_mask of imx8mq_vpu_blk_ctl_domain_data. Let imx8mq_vpu_power_notifier() do really vpu reset.

Fixes 608d7c325e85 ("soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl")
Signed-off-by Ming Qian <[email protected]>
Reviewed-by Benjamin Gaignard <[email protected]>
Reviewed-by Peng Fan <[email protected]>
Reviewed-by Frank Li <[email protected]>
Cc [email protected]
Signed-off-by Ulf Hansson <[email protected]>
Signed-off-by Sasha Levin <[email protected]>
---
 drivers/soc/imx/imx8m-blk-ctrl.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)
drivers/soc/imx/imx8m-blk-ctrl.c +7 -4
index 00879615a7015..a430c14ce16d3 100644
@@ -810,22 +810,25 @@ static int imx8mq_vpu_power_notifier(struct notifier_block *nb,
 	return NOTIFY_OK;
 }
 
+/*
+ * For i.MX8MQ, the ADB in the VPUMIX domain has no separate reset and clock
+ * enable bits, but is ungated and reset together with the VPUs.
+ * Resetting G1 or G2 separately may led to system hang.
+ * Remove the rst_mask and clk_mask from the domain data of G1 and G2,
+ * Let imx8mq_vpu_power_notifier() do really vpu reset.
+ */
 static const struct imx8m_blk_ctrl_domain_data imx8mq_vpu_blk_ctl_domain_data[] = {
 	[IMX8MQ_VPUBLK_PD_G1] = {
 		.name = "vpublk-g1",
 		.clk_names = (const char *[]){ "g1", },
 		.num_clks = 1,
 		.gpc_name = "g1",
-		.rst_mask = BIT(1),
-		.clk_mask = BIT(1),
 	},
 	[IMX8MQ_VPUBLK_PD_G2] = {
 		.name = "vpublk-g2",
 		.clk_names = (const char *[]){ "g2", },
 		.num_clks = 1,
 		.gpc_name = "g2",
-		.rst_mask = BIT(0),
-		.clk_mask = BIT(0),
 	},
 };
Signature · 1 line
2.51.0