Linux 6.12.75
Subsystems (2)
Sasha Levin
maintainer-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA512
I'm announcing the release of the 6.12.75 kernel.
All users of the 6.12 kernel series must upgrade.
The updated 6.12.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-6.12.y
and can be browsed at the normal kernel.org git web browser:
https://git.kernel.org/?p=linux/kernel/git/stable/linux-stable.git;a=summary
Thanks,
Sasha
- ------------
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Sasha Levin
maintainerDocumentation/PCI/endpoint/pci-vntb-howto.rst +7 -7
@@ -52,14 +52,14 @@ pci-epf-vntb device, the following commands can be used:: # cd /sys/kernel/config/pci_ep/ # mkdir functions/pci_epf_vntb/func1 -The "mkdir func1" above creates the pci-epf-ntb function device that will +The "mkdir func1" above creates the pci-epf-vntb function device that will be probed by pci_epf_vntb driver. The PCI endpoint framework populates the directory with the following configurable fields:: - # ls functions/pci_epf_ntb/func1 - baseclass_code deviceid msi_interrupts pci-epf-ntb.0 + # ls functions/pci_epf_vntb/func1 + baseclass_code deviceid msi_interrupts pci-epf-vntb.0 progif_code secondary subsys_id vendorid cache_line_size interrupt_pin msix_interrupts primary revid subclass_code subsys_vendor_id
@@ -106,13 +106,13 @@ A sample configuration for virtual NTB driver for virtual PCI bus:: # echo 0x080A > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid # echo 0x10 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number -Binding pci-epf-ntb Device to EP Controller +Binding pci-epf-vntb Device to EP Controller -------------------------------------------- NTB function device should be attached to PCI endpoint controllers connected to the host. - # ln -s controllers/5f010000.pcie_ep functions/pci-epf-ntb/func1/primary + # ln -s controllers/5f010000.pcie_ep functions/pci_epf_vntb/func1/primary Once the above step is completed, the PCI endpoint controllers are ready to establish a link with the host.
@@ -134,7 +134,7 @@ lspci Output at Host side ------------------------- Note that the devices listed here correspond to the values populated in -"Creating pci-epf-ntb Device" section above:: +"Creating pci-epf-vntb Device" section above:: # lspci 00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0000 (rev 01)
@@ -147,7 +147,7 @@ lspci Output at EP Side / Virtual PCI bus ----------------------------------------- Note that the devices listed here correspond to the values populated in -"Creating pci-epf-ntb Device" section above:: +"Creating pci-epf-vntb Device" section above:: # lspci 10:00.0 Unassigned class [ffff]: Dawicontrol Computersysteme GmbH Device 1234 (rev ff)
Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +27 -1
@@ -31,12 +31,15 @@ properties: - description: PLL register block clocks: - maxItems: 2 + minItems: 2 + maxItems: 3 clock-names: + minItems: 2 items: - const: aux - const: cfg_ahb + - const: ref "#clock-cells": const: 1
@@ -58,6 +61,29 @@ required: - "#clock-cells" - "#phy-cells" +allOf: + - if: + properties: + compatible: + enum: + - qcom,x1e80100-dp-phy + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + minItems: 3 + maxItems: 3 + else: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + minItems: 2 + maxItems: 2 + additionalProperties: false examples:
Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml +3 -3
@@ -18,10 +18,10 @@ properties: reg: maxItems: 1 - avdd-supply: + AVDD-supply: description: Analog power supply - dvdd-supply: + DVDD-supply: description: Digital power supply reset-gpios:
@@ -56,7 +56,7 @@ allOf: properties: dsd-path: false -additionalProperties: false +unevaluatedProperties: false examples: - |
Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml +2 -2
@@ -19,10 +19,10 @@ properties: reg: maxItems: 1 - avdd-supply: + AVDD-supply: description: A 1.8V supply that powers up the AVDD pin. - dvdd-supply: + DVDD-supply: description: A 1.2V supply that powers up the DVDD pin. reset-gpios:
Documentation/hwmon/mpq8785.rst +15 -5
@@ -5,6 +5,7 @@ Kernel driver mpq8785 Supported chips: + * MPS MPM82504 * MPS MPQ8785 Prefix: 'mpq8785'
@@ -14,6 +15,14 @@ Author: Charles Hsu <[email protected]> Description ----------- +The MPM82504 is a quad 25A, scalable, fully integrated power module with a PMBus +interface. The device offers a complete power solution that achieves up to 25A +per output channel. The MPM82504 has four output channels that can be paralleled +to provide 50A, 75A, or 100A of output current for flexible configurations. +The device can also operate in parallel with the MPM3695-100 and additional +MPM82504 devices to provide a higher output current. The MPM82504 operates +at high efficiency across a wide load range. + The MPQ8785 is a fully integrated, PMBus-compatible, high-frequency, synchronous buck converter. The MPQ8785 offers a very compact solution that achieves up to 40A output current per phase, with excellent load and line regulation over a
@@ -23,18 +32,19 @@ output current load range. The PMBus interface provides converter configurations and key parameters monitoring. -The MPQ8785 adopts MPS's proprietary multi-phase digital constant-on-time (MCOT) +The devices adopts MPS's proprietary multi-phase digital constant-on-time (MCOT) control, which provides fast transient response and eases loop stabilization. -The MCOT scheme also allows multiple MPQ8785 devices to be connected in parallel -with excellent current sharing and phase interleaving for high-current +The MCOT scheme also allows multiple devices or channels to be connected in +parallel with excellent current sharing and phase interleaving for high-current applications. Fully integrated protection features include over-current protection (OCP), over-voltage protection (OVP), under-voltage protection (UVP), and over-temperature protection (OTP). -The MPQ8785 requires a minimal number of readily available, standard external -components, and is available in a TLGA (5mmx6mm) package. +All supported modules require a minimal number of readily available, standard +external components. The MPM82504 is available in a BGA (15mmx30mmx5.18mm) +package and the MPQ8785 is available in a TLGA (5mmx6mm) package. Device compliant with:
Documentation/trace/events-pci.rst new file +74 -0
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Documentation/trace/index.rst +81 -15
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Makefile +11 -2
@@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 6 PATCHLEVEL = 12 -SUBLEVEL = 74 +SUBLEVEL = 75 EXTRAVERSION = NAME = Baby Opossum Posse
@@ -1370,6 +1370,15 @@ ifneq ($(wildcard $(resolve_btfids_O)),) $(Q)$(MAKE) -sC $(srctree)/tools/bpf/resolve_btfids O=$(resolve_btfids_O) clean endif +PHONY += objtool_clean + +objtool_O = $(abspath $(objtree))/tools/objtool + +objtool_clean: +ifneq ($(wildcard $(objtool_O)),) + $(Q)$(MAKE) -sC $(abs_srctree)/tools/objtool O=$(objtool_O) srctree=$(abs_srctree) clean +endif + tools/: FORCE $(Q)mkdir -p $(objtree)/tools $(Q)$(MAKE) O=$(abspath $(objtree)) subdir=tools -C $(srctree)/tools/
@@ -1527,7 +1536,7 @@ vmlinuxclean: $(Q)$(CONFIG_SHELL) $(srctree)/scripts/link-vmlinux.sh clean $(Q)$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) clean) -clean: archclean vmlinuxclean resolve_btfids_clean +clean: archclean vmlinuxclean resolve_btfids_clean objtool_clean # mrproper - Delete all generated files, including .config #
arch/alpha/include/asm/pgtable.h +32 -1
@@ -17,6 +17,7 @@#include <asm/processor.h> /* For TASK_SIZE */ #include <asm/machvec.h> #include <asm/setup.h> +#include <linux/page_table_check.h> struct mm_struct ;struct vm_area_struct ;
@@ -213,6 +214,9 @@ extern inline void pud_set(pud_t * pudp, pmd_t * pmdp) {pud_val (*pudp) = _PAGE_TABLE | ((((unsigned long ) pmdp) -PAGE_OFFSET ) << (32 -PAGE_SHIFT )); } +extern void migrate_flush_tlb_page (struct vm_area_struct *vma, +unsigned long addr); +extern inline unsigned long pmd_page_vaddr (pmd_t pmd) {
@@ -232,7 +236,7 @@ extern inline int pte_none(pte_t pte) { return !pte_val(pte); }extern inline int pte_present (pte_t pte) {return pte_val (pte) & _PAGE_VALID; }extern inline void pte_clear (struct mm_struct *mm,unsigned long addr,pte_t *ptep) { -pte_val (*ptep) =0 ; +WRITE_ONCE (pte_val (*ptep),0 ); }extern inline int pmd_none (pmd_t pmd) {return !pmd_val (pmd); }
@@ -294,6 +298,33 @@ extern inline pte_t * pte_offset_kernel(pmd_t * dir, unsigned long address)extern pgd_t swapper_pg_dir[1024 ]; +#ifdef CONFIG_COMPACTION +#define __HAVE_ARCH_PTEP_GET_AND_CLEAR + +static inline pte_t ptep_get_and_clear (struct mm_struct *mm, +unsigned long address, +pte_t *ptep) +{ +pte_t pte =READ_ONCE (*ptep); + +pte_clear (mm, address, ptep); +return pte; +} + +#define __HAVE_ARCH_PTEP_CLEAR_FLUSH + +static inline pte_t ptep_clear_flush (struct vm_area_struct *vma, +unsigned long addr,pte_t *ptep) +{ +struct mm_struct *mm = vma->vm_mm; +pte_t pte =ptep_get_and_clear (mm, addr, ptep); + +page_table_check_pte_clear (mm, pte); +migrate_flush_tlb_page (vma, addr); +return pte; +} + +#endif /* * The Alpha doesn't have any external MMU info: the kernel page * tables contain all the necessary information.
arch/alpha/include/asm/tlbflush.h +3 -1
@@ -58,7 +58,9 @@ flush_tlb_other(struct mm_struct *mm)unsigned long *mmc = &mm->context[smp_processor_id ()];/* Check it's not zero first to avoid cacheline ping pong when possible. */ -if (*mmc) *mmc =0 ; + +if (READ_ONCE (*mmc)) +WRITE_ONCE (*mmc,0 ); }#ifndef CONFIG_SMP
arch/alpha/mm/Makefile +1 -1
@@ -3,4 +3,4 @@ # Makefile for the linux alpha-specific parts of the memory manager. # -obj-y := init.o fault.o +obj-y := init.o fault.o tlbflush.o
arch/alpha/mm/tlbflush.c new file +112 -0
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arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts +1 -0
@@ -102,6 +102,7 @@ &touchscreen { /* The P66 uses a different EINT then the reference design */ interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */ /* The icn8318 binding expects wake-gpios instead of power-gpios */ + /delete-property/ power-gpios; wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ touchscreen-size-x = <800>; touchscreen-size-y = <480>;
arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +2 -1
@@ -301,8 +301,9 @@ i2c2: i2c@400a8000 { mpwm: mpwm@400e8000 { compatible = "nxp,lpc3220-motor-pwm"; reg = <0x400e8000 0x78>; + clocks = <&clk LPC32XX_CLK_MCPWM>; + #pwm-cells = <3>; status = "disabled"; - #pwm-cells = <2>; }; };
arch/arm/kernel/vdso.c +1 -0
@@ -172,6 +172,7 @@ static void __init patch_vdso(void *ehdr)vdso_nullpatch_one (&einfo,"__vdso_gettimeofday" );vdso_nullpatch_one (&einfo,"__vdso_clock_gettime" );vdso_nullpatch_one (&einfo,"__vdso_clock_gettime64" ); +vdso_nullpatch_one (&einfo,"__vdso_clock_getres" ); } }
arch/arm/mach-omap2/control.c +10 -4
@@ -732,7 +732,7 @@ int __init omap2_control_base_init(void)*/ int __init omap_control_init (void ) { -struct device_node *np, *scm_conf; +struct device_node *np, *scm_conf, *clocks_node;const struct of_device_id *match;const struct omap_prcm_init_data *data;int ret;
@@ -753,16 +753,19 @@ int __init omap_control_init(void)if (IS_ERR (syscon)) { ret =PTR_ERR (syscon); - goto of_node_put; + goto err_put_scm_conf; } -if (of_get_child_by_name (scm_conf,"clocks" )) { + clocks_node =of_get_child_by_name (scm_conf,"clocks" ); +if (clocks_node) { +of_node_put (clocks_node); ret =omap2_clk_provider_init (scm_conf, data->index, syscon,NULL );if (ret) - goto of_node_put; + goto err_put_scm_conf; } +of_node_put (scm_conf); }else {/* No scm_conf found, direct access */ ret = omap2_clk_provider_init(np, data->index, NULL,
@@ -780,6 +783,9 @@ int __init omap_control_init(void)return 0 ; +err_put_scm_conf: +if (scm_conf) +of_node_put (scm_conf); of_node_put:of_node_put (np);return ret;
arch/arm/mm/physaddr.c +1 -1
@@ -38,7 +38,7 @@ static inline bool __virt_addr_valid(unsigned long x)phys_addr_t __virt_to_phys (unsigned long x) {WARN (!__virt_addr_valid (x), -"virt_to_phys used for non-linear address: %pK (%pS)\n" , +"virt_to_phys used for non-linear address: %px (%pS)\n" , (void *)x, (void *)x);return __virt_to_phys_nodebug (x);
arch/arm64/Kbuild +4 -0
@@ -1,4 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only + +# Branch profiling isn't noinstr-safe +subdir-ccflags-$(CONFIG_TRACE_BRANCH_PROFILING) += -DDISABLE_BRANCH_PROFILING + obj-y += kernel/ mm/ net/ obj-$(CONFIG_KVM) += kvm/ obj-$(CONFIG_XEN) += xen/
arch/arm64/Kconfig +1 -0
@@ -216,6 +216,7 @@ config ARM64 select HAVE_FTRACE_MCOUNT_RECORD select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_ERROR_INJECTION + select HAVE_FUNCTION_GRAPH_FREGS select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_GRAPH_RETVAL select HAVE_GCC_PLUGINS
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +7 -0
@@ -570,6 +570,10 @@ sdio: mmc@88000 { no-sd; resets = <&reset RESET_SD_EMMC_A>; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>; + assigned-clock-rates = <24000000>; + }; sd: mmc@8a000 {
@@ -585,6 +589,9 @@ sd: mmc@8a000 { no-sdio; resets = <&reset RESET_SD_EMMC_B>; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>; + assigned-clock-rates = <24000000>; }; nand: nand-controller@8d000 {
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +6 -0
@@ -1923,6 +1923,9 @@ sd_emmc_b: mmc@5000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; sd_emmc_c: mmc@7000 {
@@ -1935,6 +1938,9 @@ sd_emmc_c: mmc@7000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; nfc: nand-controller@7800 {
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +9 -0
@@ -2408,6 +2408,9 @@ sd_emmc_a: mmc@ffe03000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_A_CLK0>; + assigned-clock-rates = <24000000>; }; sd_emmc_b: mmc@ffe05000 {
@@ -2420,6 +2423,9 @@ sd_emmc_b: mmc@ffe05000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; sd_emmc_c: mmc@ffe07000 {
@@ -2432,6 +2438,9 @@ sd_emmc_c: mmc@ffe07000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; usb: usb@ffe09000 {
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +9 -0
@@ -799,6 +799,9 @@ &sd_emmc_a { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_A_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_b {
@@ -807,6 +810,9 @@ &sd_emmc_b { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_c {
@@ -815,6 +821,9 @@ &sd_emmc_c { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; &simplefb_hdmi {
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +9 -0
@@ -869,6 +869,9 @@ &sd_emmc_a { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_A_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_b {
@@ -877,6 +880,9 @@ &sd_emmc_b { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_c {
@@ -885,6 +891,9 @@ &sd_emmc_c { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; &simplefb_hdmi {
arch/arm64/boot/dts/amlogic/meson-s4.dtsi +11 -2
@@ -814,13 +814,16 @@ sdio: mmc@fe088000 { reg = <0x0 0xfe088000 0x0 0x800>; interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc_periphs CLKID_SDEMMC_A>, - <&xtal>, + <&clkc_periphs CLKID_SD_EMMC_A>, <&clkc_pll CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; cap-sdio-irq; keep-power-in-suspend; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>; + assigned-clock-rates = <24000000>; }; sd: mmc@fe08a000 {
@@ -833,6 +836,9 @@ sd: mmc@fe08a000 { clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>; + assigned-clock-rates = <24000000>; }; emmc: mmc@fe08c000 {
@@ -840,13 +846,16 @@ emmc: mmc@fe08c000 { reg = <0x0 0xfe08c000 0x0 0x800>; interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>; clocks = <&clkc_periphs CLKID_NAND>, - <&xtal>, + <&clkc_periphs CLKID_SD_EMMC_C>, <&clkc_pll CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_NAND_EMMC>; no-sdio; no-sd; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_C>; + assigned-clock-rates = <24000000>; }; }; };
arch/arm64/boot/dts/apple/t8112-j473.dts +19 -0
@@ -21,6 +21,25 @@ aliases { }; }; +/* + * Keep the power-domains used for the HDMI port on. + */ +&framebuffer0 { + power-domains = <&ps_dispext_cpu0>, <&ps_dptx_ext_phy>; +}; + +/* + * The M2 Mac mini uses dispext for the HDMI output so it's not necessary to + * keep disp0 power-domains always-on. + */ +&ps_disp0_sys { + /delete-property/ apple,always-on; +}; + +&ps_disp0_fe { + /delete-property/ apple,always-on; +}; + /* * Force the bus number assignments so that we can declare some of the * on-board devices and properties that are populated by the bootloader
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts +1 -1
@@ -704,7 +704,7 @@ pinctrl_hdmi: hdmigrp { fsl,pins = <MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c2>, <MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c2>, <MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000010>, - <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000154>; + <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000030>; }; pinctrl_gpt1: gpt1grp {
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +1 -1
@@ -859,7 +859,7 @@ pinctrl_hdmi: hdmigrp { fsl,pins = <MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c2>, <MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c2>, <MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000010>, - <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000010>; + <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000030>; }; pinctrl_hoggpio2: hoggpio2grp {
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts +1 -1
@@ -91,7 +91,7 @@ bluetooth@2 { &pio { bt_pins_wakeup: bt-pins-wakeup { - piins-bt-wakeup { + pins-bt-wakeup { pinmux = <PINMUX_GPIO42__FUNC_GPIO42>; input-enable; };
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +2 -0
@@ -1782,6 +1782,8 @@ usb2-0 { status = "okay"; vbus-supply = <&usbc_vbus>; mode = "otg"; + usb-role-switch; + role-switch-default-mode = "host"; }; usb3-0 {
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +1 -1
@@ -378,7 +378,7 @@ &blsp2_i2c1 { status = "okay"; sideinteraction: touch@2c { - compatible = "ad,ad7147_captouch"; + compatible = "adi,ad7147_captouch"; reg = <0x2c>; pinctrl-names = "default", "sleep";
arch/arm64/boot/dts/qcom/qcm2290.dtsi +6 -2
@@ -1434,8 +1434,12 @@ usb_dwc3_ss: endpoint { gpu: gpu@5900000 { compatible = "qcom,adreno-07000200", "qcom,adreno"; - reg = <0x0 0x05900000 0x0 0x40000>; - reg-names = "kgsl_3d0_reg_memory"; + reg = <0x0 0x05900000 0x0 0x40000>, + <0x0 0x0599e000 0x0 0x1000>, + <0x0 0x05961000 0x0 0x800>; + reg-names = "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +1 -1
@@ -636,7 +636,7 @@ sdc2_card_det_n: sd-card-det-n-state { &uart3 { interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <&tlmm 11 IRQ_TYPE_LEVEL_HIGH>; + <&tlmm 11 IRQ_TYPE_EDGE_FALLING>; pinctrl-0 = <&uart3_default>; pinctrl-1 = <&uart3_sleep>; pinctrl-names = "default", "sleep";
arch/arm64/boot/dts/qcom/sdm630.dtsi +2 -2
@@ -591,8 +591,8 @@ qusb2_hstx_trim: hstx-trim@240 { }; gpu_speed_bin: gpu-speed-bin@41a0 { - reg = <0x41a2 0x1>; - bits = <5 7>; + reg = <0x41a2 0x2>; + bits = <5 8>; }; };
arch/arm64/boot/dts/qcom/sdm845-db845c.dts +7 -1
@@ -378,6 +378,12 @@ vreg_l21a_2p95: ldo21 { regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; }; + vreg_l23a_3p3: ldo23 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + vreg_l24a_3p075: ldo24 { regulator-min-microvolt = <3088000>; regulator-max-microvolt = <3088000>;
@@ -858,7 +864,6 @@ &spi0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&qup_spi0_default>; - cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; can@0 { compatible = "microchip,mcp2517fd";
@@ -1164,6 +1169,7 @@ &wifi { vdd-1.8-xo-supply = <&vreg_l7a_1p8>; vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; + vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; qcom,snoc-host-cap-8bit-quirk; qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +1 -1
@@ -156,7 +156,6 @@ ts_1p8_supply: ts-1p8-regulator { gpio = <&tlmm 88 0>; enable-active-high; - regulator-boot-on; }; };
@@ -247,6 +246,7 @@ vreg_l12a_1p8: ldo12 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-boot-on; }; vreg_l14a_1p88: ldo14 {
arch/arm64/boot/dts/qcom/sm6115.dtsi +6 -2
@@ -1688,8 +1688,12 @@ usb_dwc3_ss: endpoint { gpu: gpu@5900000 { compatible = "qcom,adreno-610.0", "qcom,adreno"; - reg = <0x0 0x05900000 0x0 0x40000>; - reg-names = "kgsl_3d0_reg_memory"; + reg = <0x0 0x05900000 0x0 0x40000>, + <0x0 0x0599e000 0x0 0x1000>, + <0x0 0x05961000 0x0 0x800>; + reg-names = "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; /* There's no (real) GMU, so we have to handle quite a bunch of clocks! */ clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>,
arch/arm64/boot/dts/qcom/x1e80100.dtsi +12 -8
@@ -736,8 +736,8 @@ soc: soc@0 { #address-cells = <2>; #size-cells = <2>; - dma-ranges = <0 0 0 0 0x10 0>; - ranges = <0 0 0 0 0x10 0>; + dma-ranges = <0 0 0 0 0x100 0>; + ranges = <0 0 0 0 0x100 0>; gcc: clock-controller@100000 { compatible = "qcom,x1e80100-gcc";
@@ -2679,7 +2679,7 @@ usb_1_ss1_qmpphy: phy@fda000 { reg = <0 0x00fda000 0 0x4000>; clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, + <&tcsr TCSR_USB4_1_CLKREF_EN>, <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; clock-names = "aux",
@@ -2749,7 +2749,7 @@ usb_1_ss2_qmpphy: phy@fdf000 { reg = <0 0x00fdf000 0 0x4000>; clocks = <&gcc GCC_USB3_TERT_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, + <&tcsr TCSR_USB4_2_CLKREF_EN>, <&gcc GCC_USB3_TERT_PHY_COM_AUX_CLK>, <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>; clock-names = "aux",
@@ -5034,9 +5034,11 @@ mdss_dp2_phy: phy@aec2a00 { <0 0x0aec2000 0 0x1c8>; clocks = <&dispcc DISP_CC_MDSS_DPTX2_AUX_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>; + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&tcsr TCSR_EDP_CLKREF_EN>; clock-names = "aux", - "cfg_ahb"; + "cfg_ahb", + "ref"; power-domains = <&rpmhpd RPMHPD_MX>;
@@ -5054,9 +5056,11 @@ mdss_dp3_phy: phy@aec5a00 { <0 0x0aec5000 0 0x1c8>; clocks = <&dispcc DISP_CC_MDSS_DPTX3_AUX_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>; + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&tcsr TCSR_EDP_CLKREF_EN>; clock-names = "aux", - "cfg_ahb"; + "cfg_ahb", + "ref"; power-domains = <&rpmhpd RPMHPD_MX>;
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +0 -4
@@ -428,10 +428,6 @@ &gpu { status = "okay"; }; -&hdmi_sound { - status = "okay"; -}; - &i2c0 { clock-frequency = <400000>; i2c-scl-falling-time-ns = <4>;
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +0 -36
@@ -2350,42 +2350,6 @@ watchdog3: watchdog@2230000 { assigned-clock-parents = <&k3_clks 351 4>; }; - watchdog4: watchdog@2240000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2240000 0x00 0x100>; - clocks = <&k3_clks 352 0>; - power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 352 0>; - assigned-clock-parents = <&k3_clks 352 4>; - }; - - watchdog5: watchdog@2250000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2250000 0x00 0x100>; - clocks = <&k3_clks 353 0>; - power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 353 0>; - assigned-clock-parents = <&k3_clks 353 4>; - }; - - watchdog6: watchdog@2260000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2260000 0x00 0x100>; - clocks = <&k3_clks 354 0>; - power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 354 0>; - assigned-clock-parents = <&k3_clks 354 4>; - }; - - watchdog7: watchdog@2270000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2270000 0x00 0x100>; - clocks = <&k3_clks 355 0>; - power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 355 0>; - assigned-clock-parents = <&k3_clks 355 4>; - }; - /* * The following RTI instances are coupled with MCU R5Fs, c7x and * GPU so keeping them reserved as these will be used by their
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +47 -11
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arch/arm64/boot/dts/xilinx/zynqmp.dtsi +0 -5
@@ -187,11 +187,6 @@ psci { }; firmware { - optee: optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - zynqmp_firmware: zynqmp-firmware { compatible = "xlnx,zynqmp-firmware"; #power-domain-cells = <1>;
arch/arm64/include/asm/ftrace.h +38 -26
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arch/arm64/include/asm/pgtable.h +7 -2
@@ -93,8 +93,6 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys) __pte(__phys_to_pte_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))#define pte_none (pte) (!pte_val(pte)) -#define __pte_clear (mm, addr, ptep) \ - __set_pte(ptep, __pte(0))#define pte_page (pte) (pfn_to_page(pte_pfn(pte)))/*
@@ -1224,6 +1222,13 @@ static inline bool pud_user_accessible_page(pud_t pud)/* * Atomic pte/pmd modifications. */ + +static inline void __pte_clear (struct mm_struct *mm, +unsigned long addr,pte_t *ptep) +{ +__set_pte (ptep,__pte (0 )); +} +static inline int __ptep_test_and_clear_young (struct vm_area_struct *vma,unsigned long address,pte_t *ptep)
arch/arm64/include/asm/rwonce.h +1 -1
@@ -62,7 +62,7 @@default : \ atomic =0 ; \ } \ - atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(__x))__x);\ + atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(*__x) *)__x);\ })#endif /* !BUILD_VDSO */
arch/arm64/kernel/asm-offsets.c +11 -23
@@ -85,19 +85,19 @@ int main(void)DEFINE (PT_REGS_SIZE ,sizeof (struct pt_regs ));BLANK ();#ifdef CONFIG_DYNAMIC_FTRACE_WITH_ARGS - DEFINE(FREGS_X0, offsetof(struct ftrace_regs, regs[0])); - DEFINE(FREGS_X2, offsetof(struct ftrace_regs, regs[2])); - DEFINE(FREGS_X4, offsetof(struct ftrace_regs, regs[4])); - DEFINE(FREGS_X6, offsetof(struct ftrace_regs, regs[6])); - DEFINE(FREGS_X8, offsetof(struct ftrace_regs, regs[8])); -DEFINE (FREGS_FP , offsetof(struct ftrace_regs , fp)); -DEFINE (FREGS_LR , offsetof(struct ftrace_regs , lr)); -DEFINE (FREGS_SP , offsetof(struct ftrace_regs , sp)); -DEFINE (FREGS_PC , offsetof(struct ftrace_regs , pc)); + DEFINE(FREGS_X0, offsetof(struct __arch_ftrace_regs, regs[0])); + DEFINE(FREGS_X2, offsetof(struct __arch_ftrace_regs, regs[2])); + DEFINE(FREGS_X4, offsetof(struct __arch_ftrace_regs, regs[4])); + DEFINE(FREGS_X6, offsetof(struct __arch_ftrace_regs, regs[6])); + DEFINE(FREGS_X8, offsetof(struct __arch_ftrace_regs, regs[8])); +DEFINE (FREGS_FP , offsetof(struct __arch_ftrace_regs , fp)); +DEFINE (FREGS_LR , offsetof(struct __arch_ftrace_regs , lr)); +DEFINE (FREGS_SP , offsetof(struct __arch_ftrace_regs , sp)); +DEFINE (FREGS_PC , offsetof(struct __arch_ftrace_regs , pc));#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS -DEFINE (FREGS_DIRECT_TRAMP , offsetof(struct ftrace_regs , direct_tramp)); +DEFINE (FREGS_DIRECT_TRAMP , offsetof(struct __arch_ftrace_regs , direct_tramp));#endif -DEFINE (FREGS_SIZE ,sizeof (struct ftrace_regs )); +DEFINE (FREGS_SIZE ,sizeof (struct __arch_ftrace_regs ));BLANK ();#endif #ifdef CONFIG_COMPAT
@@ -203,18 +203,6 @@ int main(void)DEFINE (FTRACE_OPS_FUNC , offsetof(struct ftrace_ops , func));#endif BLANK (); -#ifdef CONFIG_FUNCTION_GRAPH_TRACER - DEFINE(FGRET_REGS_X0, offsetof(struct fgraph_ret_regs, regs[0])); - DEFINE(FGRET_REGS_X1, offsetof(struct fgraph_ret_regs, regs[1])); - DEFINE(FGRET_REGS_X2, offsetof(struct fgraph_ret_regs, regs[2])); - DEFINE(FGRET_REGS_X3, offsetof(struct fgraph_ret_regs, regs[3])); - DEFINE(FGRET_REGS_X4, offsetof(struct fgraph_ret_regs, regs[4])); - DEFINE(FGRET_REGS_X5, offsetof(struct fgraph_ret_regs, regs[5])); - DEFINE(FGRET_REGS_X6, offsetof(struct fgraph_ret_regs, regs[6])); - DEFINE(FGRET_REGS_X7, offsetof(struct fgraph_ret_regs, regs[7])); -DEFINE (FGRET_REGS_FP , offsetof(struct fgraph_ret_regs , fp)); -DEFINE (FGRET_REGS_SIZE ,sizeof (struct fgraph_ret_regs )); -#endif #ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS DEFINE (FTRACE_OPS_DIRECT_CALL , offsetof(struct ftrace_ops , direct_call));#endif
arch/arm64/kernel/entry-ftrace.S +18 -14
@@ -329,24 +329,28 @@ SYM_FUNC_END(ftrace_stub_graph) * @fp is checked against the value passed by ftrace_graph_caller(). */ SYM_CODE_START(return_to_handler) - /* save return value regs */ - sub sp, sp, #FGRET_REGS_SIZE - stp x0, x1, [sp, #FGRET_REGS_X0] - stp x2, x3, [sp, #FGRET_REGS_X2] - stp x4, x5, [sp, #FGRET_REGS_X4] - stp x6, x7, [sp, #FGRET_REGS_X6] - str x29, [sp, #FGRET_REGS_FP] // parent's fp + /* Make room for ftrace_regs */ + sub sp, sp, #FREGS_SIZE + + /* Save return value regs */ + stp x0, x1, [sp, #FREGS_X0] + stp x2, x3, [sp, #FREGS_X2] + stp x4, x5, [sp, #FREGS_X4] + stp x6, x7, [sp, #FREGS_X6] + + /* Save the callsite's FP */ + str x29, [sp, #FREGS_FP] mov x0, sp - bl ftrace_return_to_handler // addr = ftrace_return_to_hander(regs); + bl ftrace_return_to_handler // addr = ftrace_return_to_hander(fregs); mov x30, x0 // restore the original return address - /* restore return value regs */ - ldp x0, x1, [sp, #FGRET_REGS_X0] - ldp x2, x3, [sp, #FGRET_REGS_X2] - ldp x4, x5, [sp, #FGRET_REGS_X4] - ldp x6, x7, [sp, #FGRET_REGS_X6] - add sp, sp, #FGRET_REGS_SIZE + /* Restore return value regs */ + ldp x0, x1, [sp, #FREGS_X0] + ldp x2, x3, [sp, #FREGS_X2] + ldp x4, x5, [sp, #FREGS_X4] + ldp x6, x7, [sp, #FREGS_X6] + add sp, sp, #FREGS_SIZE ret SYM_CODE_END(return_to_handler)
arch/arm64/kernel/ftrace.c +5 -5
@@ -23,10 +23,10 @@ struct fregs_offset {int offset; }; -#define FREGS_OFFSET (n, field) \ -{ \ - .name = n, \ - .offset = offsetof(struct ftrace_regs, field), \ +#define FREGS_OFFSET (n, field) \ +{ \ + .name = n, \ + .offset = offsetof(struct __arch_ftrace_regs, field), \ }static const struct fregs_offset fregs_offsets[] = {
@@ -488,7 +488,7 @@ void prepare_ftrace_return(unsigned long self_addr, unsigned long *parent,void ftrace_graph_func (unsigned long ip,unsigned long parent_ip,struct ftrace_ops *op,struct ftrace_regs *fregs) { -prepare_ftrace_return (ip, &fregs->lr, fregs->fp); +prepare_ftrace_return (ip, &arch_ftrace_regs (fregs)->lr,arch_ftrace_regs (fregs)->fp); }#else /*
arch/arm64/kernel/proton-pack.c +1 -0
@@ -896,6 +896,7 @@ static u8 spectre_bhb_loop_affected(void)MIDR_ALL_VERSIONS (MIDR_CORTEX_X2 ),MIDR_ALL_VERSIONS (MIDR_NEOVERSE_N2 ),MIDR_ALL_VERSIONS (MIDR_NEOVERSE_V1 ), + MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), {}, };static const struct midr_range spectre_bhb_k24_list[] = {
arch/arm64/kernel/ptrace.c +3 -0
@@ -1454,6 +1454,9 @@ static int poe_get(struct task_struct *target,if (!system_supports_poe ())return -EINVAL ; +if (target == current) + current->thread.por_el0 =read_sysreg_s (SYS_POR_EL0 ); +return membuf_write (&to, &target->thread.por_el0,sizeof (target->thread.por_el0)); }
arch/arm64/lib/delay.c +19 -4
@@ -23,9 +23,24 @@ static inline unsigned long xloops_to_cycles(unsigned long xloops)return (xloops * loops_per_jiffy *HZ ) >>32 ; } +/* +* Force the use of CNTVCT_EL0 in order to have the same base as WFxT. +* This avoids some annoying issues when CNTVOFF_EL2 is not reset 0 on a +* KVM host running at EL1 until we do a vcpu_put() on the vcpu. When +* running at EL2, the effective offset is always 0. +* +* Note that userspace cannot change the offset behind our back either, +* as the vcpu mutex is held as long as KVM_RUN is in progress. +*/ +static cycles_t notrace __delay_cycles(void) +{ +guard (preempt_notrace)(); +return __arch_counter_get_cntvct_stable (); +} +void __delay (unsigned long cycles) { -cycles_t start =get_cycles (); +cycles_t start =__delay_cycles ();if (alternative_has_cap_unlikely (ARM64_HAS_WFXT )) {u64 end = start + cycles;
@@ -35,17 +50,17 @@ void __delay(unsigned long cycles)* early, use a WFET loop to complete the delay. */ wfit (end); -while ((get_cycles () - start) < cycles) +while ((__delay_cycles () - start) < cycles)wfet (end); }else if (arch_timer_evtstrm_available ()) {const cycles_t timer_evt_period =USECS_TO_CYCLES (ARCH_TIMER_EVT_STREAM_PERIOD_US ); -while ((get_cycles () - start + timer_evt_period) < cycles) +while ((__delay_cycles () - start + timer_evt_period) < cycles)wfe (); } -while ((get_cycles () - start) < cycles) +while ((__delay_cycles () - start) < cycles)cpu_relax (); }EXPORT_SYMBOL (__delay);
arch/loongarch/Kconfig +1 -1
@@ -136,7 +136,7 @@ config LOONGARCH select HAVE_FTRACE_MCOUNT_RECORD select HAVE_FUNCTION_ARG_ACCESS_API select HAVE_FUNCTION_ERROR_INJECTION - select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER + select HAVE_FUNCTION_GRAPH_FREGS select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_TRACER select HAVE_GCC_PLUGINS
arch/loongarch/include/asm/ftrace.h +7 -46
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arch/loongarch/include/asm/topology.h +1 -1
@@ -12,7 +12,7 @@extern cpumask_t cpus_on_node[]; -#define cpumask_of_node (node) (&cpus_on_node[node]) +#define cpumask_of_node (node) ((node) == NUMA_NO_NODE ? cpu_all_mask : &cpus_on_node[node])struct pci_bus ;extern int pcibus_to_node (struct pci_bus *);
arch/loongarch/kernel/asm-offsets.c +0 -12
@@ -281,18 +281,6 @@ static void __used output_pbe_defines(void) }#endif -#ifdef CONFIG_FUNCTION_GRAPH_TRACER -static void __used output_fgraph_ret_regs_defines (void ) -{ -COMMENT ("LoongArch fgraph_ret_regs offsets." ); -OFFSET (FGRET_REGS_A0 , fgraph_ret_regs, regs[0 ]); -OFFSET (FGRET_REGS_A1 , fgraph_ret_regs, regs[1 ]); -OFFSET (FGRET_REGS_FP , fgraph_ret_regs, fp); -DEFINE (FGRET_REGS_SIZE ,sizeof (struct fgraph_ret_regs )); -BLANK (); -} -#endif -static void __used output_kvm_defines (void ) {COMMENT ("KVM/LoongArch Specific offsets." );
arch/loongarch/kernel/ftrace_dyn.c +1 -1
@@ -241,7 +241,7 @@ void prepare_ftrace_return(unsigned long self_addr, unsigned long *parent)void ftrace_graph_func (unsigned long ip,unsigned long parent_ip,struct ftrace_ops *op,struct ftrace_regs *fregs) { -struct pt_regs *regs = &fregs->regs; +struct pt_regs *regs = &arch_ftrace_regs (fregs)->regs;unsigned long *parent = (unsigned long *)®s->regs[1 ];prepare_ftrace_return (ip, (unsigned long *)parent);
arch/loongarch/kernel/mcount.S +10 -7
@@ -79,10 +79,11 @@ SYM_FUNC_START(ftrace_graph_caller) SYM_FUNC_END(ftrace_graph_caller) SYM_FUNC_START(return_to_handler) - PTR_ADDI sp, sp, -FGRET_REGS_SIZE - PTR_S a0, sp, FGRET_REGS_A0 - PTR_S a1, sp, FGRET_REGS_A1 - PTR_S zero, sp, FGRET_REGS_FP + /* Save return value regs */ + PTR_ADDI sp, sp, -PT_SIZE + PTR_S a0, sp, PT_R4 + PTR_S a1, sp, PT_R5 + PTR_S zero, sp, PT_R22 move a0, sp bl ftrace_return_to_handler
@@ -90,9 +91,11 @@ SYM_FUNC_START(return_to_handler) /* Restore the real parent address: a0 -> ra */ move ra, a0 - PTR_L a0, sp, FGRET_REGS_A0 - PTR_L a1, sp, FGRET_REGS_A1 - PTR_ADDI sp, sp, FGRET_REGS_SIZE + /* Restore return value regs */ + PTR_L a0, sp, PT_R4 + PTR_L a1, sp, PT_R5 + PTR_ADDI sp, sp, PT_SIZE + jr ra SYM_FUNC_END(return_to_handler) #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
arch/loongarch/kernel/mcount_dyn.S +7 -7
@@ -144,19 +144,19 @@ SYM_CODE_END(ftrace_graph_caller) SYM_CODE_START(return_to_handler) UNWIND_HINT_UNDEFINED /* Save return value regs */ - PTR_ADDI sp, sp, -FGRET_REGS_SIZE - PTR_S a0, sp, FGRET_REGS_A0 - PTR_S a1, sp, FGRET_REGS_A1 - PTR_S zero, sp, FGRET_REGS_FP + PTR_ADDI sp, sp, -PT_SIZE + PTR_S a0, sp, PT_R4 + PTR_S a1, sp, PT_R5 + PTR_S zero, sp, PT_R22 move a0, sp bl ftrace_return_to_handler move ra, a0 /* Restore return value regs */ - PTR_L a0, sp, FGRET_REGS_A0 - PTR_L a1, sp, FGRET_REGS_A1 - PTR_ADDI sp, sp, FGRET_REGS_SIZE + PTR_L a0, sp, PT_R4 + PTR_L a1, sp, PT_R5 + PTR_ADDI sp, sp, PT_SIZE jr ra SYM_CODE_END(return_to_handler)
arch/loongarch/kernel/setup.c +1 -0
@@ -421,6 +421,7 @@ static void __init arch_mem_init(char **cmdline_p) PFN_UP(__pa_symbol(&__nosave_end)));memblock_dump_all (); +memblock_set_bottom_up (false);early_memtest (PFN_PHYS (ARCH_PFN_OFFSET ),PFN_PHYS (max_low_pfn)); }
arch/loongarch/kernel/unwind_orc.c +1 -1
@@ -507,7 +507,7 @@ bool unwind_next_frame(struct unwind_state *state) state->pc =bt_address (pc);if (!state->pc) { -pr_err ("cannot find unwind pc at %p\n" , (void *)pc); +pr_err ("cannot find unwind pc at %px\n" , (void *)pc); goto err; }
arch/loongarch/kernel/unwind_prologue.c +1 -1
@@ -64,7 +64,7 @@ static inline bool scan_handlers(unsigned long entry_offset)static inline bool fix_exception (unsigned long pc) { -#ifdef CONFIG_NUMA +#if defined(CONFIG_NUMA ) && !defined(CONFIG_PREEMPT_RT )int cpu;for_each_possible_cpu (cpu) {
arch/loongarch/mm/tlb.c +1 -1
@@ -202,7 +202,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t *pteplocal_irq_restore (flags); } -static void setup_ptwalker (void ) +static void __no_sanitize_address setup_ptwalker(void) {unsigned long pwctl0, pwctl1;unsigned long pgd_i =0 , pgd_w =0 ;
arch/m68k/lib/memmove.c +18 -0
@@ -24,6 +24,15 @@ void *memmove(void *dest, const void *src, size_t n) src = csrc; n--; } +#if defined(CONFIG_M68000 ) +if ((long )src &1 ) { +char *cdest = dest; +const char *csrc = src; +for (; n; n--) + *cdest++ = *csrc++; +return xdest; + } +#endif if (n >2 && (long )dest &2 ) {short *sdest = dest;const short *ssrc = src;
@@ -66,6 +75,15 @@ void *memmove(void *dest, const void *src, size_t n) src = csrc; n--; } +#if defined(CONFIG_M68000 ) +if ((long )src &1 ) { +char *cdest = dest; +const char *csrc = src; +for (; n; n--) + *--cdest = *--csrc; +return xdest; + } +#endif if (n >2 && (long )dest &2 ) {short *sdest = dest;const short *ssrc = src;
arch/mips/include/asm/mach-loongson64/topology.h +1 -1
@@ -7,7 +7,7 @@#define cpu_to_node (cpu) (cpu_logical_map(cpu) >> 2)extern cpumask_t __node_cpumask[]; -#define cpumask_of_node (node) (&__node_cpumask[node]) +#define cpumask_of_node (node) ((node) == NUMA_NO_NODE ? cpu_all_mask : &__node_cpumask[node])struct pci_bus ;extern int pcibus_to_node (struct pci_bus *);
arch/mips/kernel/relocate.c +13 -0
@@ -420,7 +420,20 @@ void *__init relocate_kernel(void) goto out;/* The current thread is now within the relocated image */ +#ifndef CONFIG_CC_IS_CLANG __current_thread_info =RELOCATED (&init_thread_union); +#else +/* +* LLVM may wrongly restore $gp ($28) in epilog even if it's +* intentionally modified. Work around this by using inline +* assembly to assign $gp. $gp couldn't be listed as output or +* clobber, or LLVM will still restore its original value. +* See also LLVM upstream issue +* https://github.com/llvm/llvm-project/issues/176546 +*/ + asmvolatile ("move $28, %0" : : +"r" (RELOCATED (&init_thread_union))); +#endif /* Return the new kernel's entry point */ kernel_entry =RELOCATED (start_kernel);
arch/mips/rb532/devices.c +3 -2
@@ -212,11 +212,12 @@ static struct platform_device rb532_wdt = {static struct plat_serial8250_port rb532_uart_res[] = { { .type =PORT_16550A , - .membase = (char *)KSEG1ADDR (REGBASE +UART0BASE ), + .mapbase =REGBASE +UART0BASE , + .mapsize =0x1000 , .irq =UART0_IRQ , .regshift =2 , .iotype =UPIO_MEM , - .flags =UPF_BOOT_AUTOCONF , + .flags =UPF_BOOT_AUTOCONF |UPF_IOREMAP , }, { .flags =0 ,
arch/openrisc/include/asm/barrier.h +2 -0
@@ -4,6 +4,8 @@#define mb () asm volatile ("l.msync" ::: "memory") +#define nop () asm volatile ("l.nop") +#include <asm-generic/barrier.h> #endif /* __ASM_BARRIER_H */
arch/parisc/kernel/drivers.c +1 -1
@@ -435,7 +435,7 @@ static struct parisc_device * __init create_tree_node(char id, dev->dev.dma_mask = &dev->dma_mask; dev->dev.coherent_dma_mask = dev->dma_mask;if (device_register (&dev->dev)) { -kfree (dev); +put_device (&dev->dev);return NULL ; }
arch/parisc/kernel/process.c +3 -0
@@ -85,6 +85,9 @@ void machine_restart(char *cmd)#endif /* set up a new led state on systems shipped with a LED State panel */ pdc_chassis_send_status (PDC_CHASSIS_DIRECT_SHUTDOWN ); + +/* prevent interrupts during reboot */ +set_eiem (0 );/* "Normal" system reset */ pdc_do_reset ();
arch/powerpc/include/asm/eeh.h +2 -0
@@ -289,6 +289,8 @@ void eeh_pe_dev_traverse(struct eeh_pe *root,void eeh_pe_restore_bars (struct eeh_pe *pe);const char *eeh_pe_loc_get (struct eeh_pe *pe);struct pci_bus *eeh_pe_bus_get (struct eeh_pe *pe); +const char *eeh_pe_loc_get_bus (struct pci_bus *bus); +struct pci_bus *eeh_pe_bus_get_nolock (struct eeh_pe *pe);void eeh_show_enabled (void );int __init eeh_init (struct eeh_ops *ops);
arch/powerpc/include/asm/ftrace.h +10 -24
@@ -32,42 +32,28 @@ struct dyn_arch_ftrace {int ftrace_init_nop (struct module *mod,struct dyn_ftrace *rec);#define ftrace_init_nop ftrace_init_nop -struct ftrace_regs { -struct pt_regs regs; -}; +#include <linux/ftrace_regs.h> static __always_inline struct pt_regs *arch_ftrace_get_regs(struct ftrace_regs *fregs) {/* We clear regs.msr in ftrace_call */ -return fregs->regs.msr ? &fregs->regs :NULL ; +return arch_ftrace_regs (fregs)->regs.msr ? &arch_ftrace_regs (fregs)->regs :NULL ; } +#define arch_ftrace_fill_perf_regs (fregs, _regs) do { \ + (_regs)->result = 0; \ + (_regs)->nip = arch_ftrace_regs(fregs)->regs.nip; \ + (_regs)->gpr[1] = arch_ftrace_regs(fregs)->regs.gpr[1]; \ + asm volatile("mfmsr %0" : "=r" ((_regs)->msr)); \ + } while (0) + static __always_inline voidftrace_regs_set_instruction_pointer (struct ftrace_regs *fregs,unsigned long ip) { -regs_set_return_ip (&fregs->regs, ip); -} - -static __always_inline unsigned long -ftrace_regs_get_instruction_pointer (struct ftrace_regs *fregs) -{ -return instruction_pointer (&fregs->regs); +regs_set_return_ip (&arch_ftrace_regs (fregs)->regs, ip); } -#define ftrace_regs_get_argument (fregs, n) \ - regs_get_kernel_argument(&(fregs)->regs, n) -#define ftrace_regs_get_stack_pointer (fregs) \ - kernel_stack_pointer(&(fregs)->regs) -#define ftrace_regs_return_value (fregs) \ - regs_return_value(&(fregs)->regs) -#define ftrace_regs_set_return_value (fregs, ret) \ - regs_set_return_value(&(fregs)->regs, ret) -#define ftrace_override_function_with_return (fregs) \ - override_function_with_return(&(fregs)->regs) -#define ftrace_regs_query_register_offset (name) \ - regs_query_register_offset(name) -struct ftrace_ops ;#define ftrace_graph_func ftrace_graph_func
arch/powerpc/include/asm/kup.h +0 -2
@@ -134,7 +134,6 @@ static __always_inline void kuap_assert_locked(void) static __always_inline void allow_read_from_user(const void __user *from, unsigned long size) { -barrier_nospec ();allow_user_access (NULL , from, size,KUAP_READ ); }
@@ -146,7 +145,6 @@ static __always_inline void allow_write_to_user(void __user *to, unsigned long s static __always_inline void allow_read_write_user(void __user *to, const void __user *from,unsigned long size) { -barrier_nospec ();allow_user_access (to, from, size,KUAP_READ_WRITE ); }
arch/powerpc/include/asm/uaccess.h +4 -0
@@ -301,6 +301,7 @@ do { \__typeof__ (sizeof(*(ptr ))) __gu_size =sizeof (*(ptr)); \ \might_fault (); \ +barrier_nospec (); \allow_read_from_user (__gu_addr, __gu_size); \__get_user_size_allowed (__gu_val, __gu_addr, __gu_size, __gu_err); \prevent_read_from_user (__gu_addr, __gu_size); \
@@ -329,6 +330,7 @@ raw_copy_in_user(void __user *to, const void __user *from, unsigned long n) {unsigned long ret; +barrier_nospec ();allow_read_write_user (to, from, n); ret =__copy_tofrom_user (to, from, n);prevent_read_write_user (to, from, n);
@@ -415,6 +417,7 @@ static __must_check __always_inline bool user_access_begin(const void __user *ptmight_fault (); +barrier_nospec ();allow_read_write_user ((void __user *)ptr, ptr, len);return true; }
@@ -431,6 +434,7 @@ user_read_access_begin(const void __user *ptr, size_t len)might_fault (); +barrier_nospec ();allow_read_from_user (ptr, len);return true; }
arch/powerpc/kernel/eeh_driver.c +6 -5
@@ -846,7 +846,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)pci_lock_rescan_remove (); - bus =eeh_pe_bus_get (pe); + bus =eeh_pe_bus_get_nolock (pe);if (!bus) {pr_err ("%s: Cannot find PCI bus for PHB#%x-PE#%x\n" , __func__, pe->phb->global_number, pe->addr);
@@ -886,14 +886,15 @@ void eeh_handle_normal_event(struct eeh_pe *pe)/* Log the event */ if (pe->type &EEH_PE_PHB ) {pr_err ("EEH: Recovering PHB#%x, location: %s\n" , - pe->phb->global_number,eeh_pe_loc_get (pe)); + pe->phb->global_number,eeh_pe_loc_get_bus (bus)); }else {struct eeh_pe *phb_pe =eeh_phb_pe_get (pe->phb);pr_err ("EEH: Recovering PHB#%x-PE#%x\n" , pe->phb->global_number, pe->addr);pr_err ("EEH: PE location: %s, PHB location: %s\n" , -eeh_pe_loc_get (pe),eeh_pe_loc_get (phb_pe)); +eeh_pe_loc_get_bus (bus), +eeh_pe_loc_get_bus (eeh_pe_bus_get_nolock (phb_pe))); }#ifdef CONFIG_STACKTRACE
@@ -1098,7 +1099,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)eeh_pe_state_clear (pe,EEH_PE_PRI_BUS , true);eeh_pe_dev_mode_mark (pe,EEH_DEV_REMOVED ); - bus =eeh_pe_bus_get (pe); + bus =eeh_pe_bus_get_nolock (pe);if (bus)pci_hp_remove_devices (bus);else
@@ -1222,7 +1223,7 @@ void eeh_handle_special_event(void) (phb_pe->state & EEH_PE_RECOVERING))continue ; - bus =eeh_pe_bus_get (phb_pe); + bus =eeh_pe_bus_get_nolock (phb_pe);if (!bus) { pr_err("%s: Cannot find PCI bus for " "PHB#%x-PE#%x\n",
arch/powerpc/kernel/eeh_pe.c +70 -4
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arch/powerpc/kernel/smp.c +2 -0
@@ -821,6 +821,8 @@ static int parse_thread_groups(struct device_node *dn, count =of_property_count_u32_elems (dn,"ibm,thread-groups" ); thread_group_array =kcalloc (count,sizeof (u32),GFP_KERNEL ); +if (!thread_group_array) +return -ENOMEM ; ret =of_property_read_u32_array (dn,"ibm,thread-groups" , thread_group_array, count);if (ret)
arch/powerpc/kernel/trace/ftrace.c +2 -2
@@ -421,7 +421,7 @@ int __init ftrace_dyn_arch_init(void)void ftrace_graph_func (unsigned long ip,unsigned long parent_ip,struct ftrace_ops *op,struct ftrace_regs *fregs) { -unsigned long sp = fregs->regs.gpr[1 ]; +unsigned long sp =arch_ftrace_regs (fregs)->regs.gpr[1 ];int bit;if (unlikely (ftrace_graph_is_dead ()))
@@ -439,6 +439,6 @@ void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,ftrace_test_recursion_unlock (bit); out: - fregs->regs.link = parent_ip; + arch_ftrace_regs(fregs)->regs.link = parent_ip; }#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
arch/powerpc/kernel/trace/ftrace_64_pg.c +1 -1
@@ -829,7 +829,7 @@ __prepare_ftrace_return(unsigned long parent, unsigned long ip, unsigned long spvoid ftrace_graph_func (unsigned long ip,unsigned long parent_ip,struct ftrace_ops *op,struct ftrace_regs *fregs) { - fregs->regs.link =__prepare_ftrace_return (parent_ip, ip, fregs->regs.gpr[1 ]); +arch_ftrace_regs (fregs)->regs.link =__prepare_ftrace_return (parent_ip, ip,arch_ftrace_regs (fregs)->regs.gpr[1 ]); }#else unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip,
arch/riscv/Kconfig +1 -1
@@ -144,7 +144,7 @@ config RISCV select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL select HAVE_FUNCTION_GRAPH_TRACER - select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER + select HAVE_FUNCTION_GRAPH_FREGS select HAVE_FUNCTION_TRACER if !XIP_KERNEL && !PREEMPTION select HAVE_EBPF_JIT if MMU select HAVE_GUP_FAST if MMU
arch/riscv/include/asm/ftrace.h +32 -30
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arch/riscv/kernel/asm-offsets.c +14 -14
@@ -497,19 +497,19 @@ void asm_offsets(void)OFFSET (STACKFRAME_RA , stackframe, ra);#ifdef CONFIG_DYNAMIC_FTRACE_WITH_ARGS -DEFINE (FREGS_SIZE_ON_STACK ,ALIGN (sizeof (struct ftrace_regs ),STACK_ALIGN )); -DEFINE (FREGS_EPC , offsetof(struct ftrace_regs , epc)); -DEFINE (FREGS_RA , offsetof(struct ftrace_regs , ra)); -DEFINE (FREGS_SP , offsetof(struct ftrace_regs , sp)); -DEFINE (FREGS_S0 , offsetof(struct ftrace_regs , s0)); -DEFINE (FREGS_T1 , offsetof(struct ftrace_regs , t1)); -DEFINE (FREGS_A0 , offsetof(struct ftrace_regs , a0)); -DEFINE (FREGS_A1 , offsetof(struct ftrace_regs , a1)); -DEFINE (FREGS_A2 , offsetof(struct ftrace_regs , a2)); -DEFINE (FREGS_A3 , offsetof(struct ftrace_regs , a3)); -DEFINE (FREGS_A4 , offsetof(struct ftrace_regs , a4)); -DEFINE (FREGS_A5 , offsetof(struct ftrace_regs , a5)); -DEFINE (FREGS_A6 , offsetof(struct ftrace_regs , a6)); -DEFINE (FREGS_A7 , offsetof(struct ftrace_regs , a7)); +DEFINE (FREGS_SIZE_ON_STACK ,ALIGN (sizeof (struct __arch_ftrace_regs ),STACK_ALIGN )); +DEFINE (FREGS_EPC , offsetof(struct __arch_ftrace_regs , epc)); +DEFINE (FREGS_RA , offsetof(struct __arch_ftrace_regs , ra)); +DEFINE (FREGS_SP , offsetof(struct __arch_ftrace_regs , sp)); +DEFINE (FREGS_S0 , offsetof(struct __arch_ftrace_regs , s0)); +DEFINE (FREGS_T1 , offsetof(struct __arch_ftrace_regs , t1)); +DEFINE (FREGS_A0 , offsetof(struct __arch_ftrace_regs , a0)); +DEFINE (FREGS_A1 , offsetof(struct __arch_ftrace_regs , a1)); +DEFINE (FREGS_A2 , offsetof(struct __arch_ftrace_regs , a2)); +DEFINE (FREGS_A3 , offsetof(struct __arch_ftrace_regs , a3)); +DEFINE (FREGS_A4 , offsetof(struct __arch_ftrace_regs , a4)); +DEFINE (FREGS_A5 , offsetof(struct __arch_ftrace_regs , a5)); +DEFINE (FREGS_A6 , offsetof(struct __arch_ftrace_regs , a6)); +DEFINE (FREGS_A7 , offsetof(struct __arch_ftrace_regs , a7));#endif }
arch/riscv/kernel/ftrace.c +1 -1
@@ -214,7 +214,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,void ftrace_graph_func (unsigned long ip,unsigned long parent_ip,struct ftrace_ops *op,struct ftrace_regs *fregs) { -prepare_ftrace_return (&fregs->ra, ip, fregs->s0); +prepare_ftrace_return (&arch_ftrace_regs (fregs)->ra, ip,arch_ftrace_regs (fregs)->s0); }#else /* CONFIG_DYNAMIC_FTRACE_WITH_ARGS */ extern void ftrace_graph_call (void );
arch/riscv/kernel/mcount.S +13 -11
@@ -12,6 +12,8 @@ #include <asm/asm-offsets.h> #include <asm/ftrace.h> +#define ABI_SIZE_ON_STACK 80 + .text .macro SAVE_ABI_STATE
@@ -26,12 +28,12 @@ * register if a0 was not saved. */ .macro SAVE_RET_ABI_STATE - addi sp, sp, -4*SZREG - REG_S s0, 2*SZREG(sp) - REG_S ra, 3*SZREG(sp) - REG_S a0, 1*SZREG(sp) - REG_S a1, 0*SZREG(sp) - addi s0, sp, 4*SZREG + addi sp, sp, -ABI_SIZE_ON_STACK + REG_S ra, 1*SZREG(sp) + REG_S s0, 8*SZREG(sp) + REG_S a0, 10*SZREG(sp) + REG_S a1, 11*SZREG(sp) + addi s0, sp, ABI_SIZE_ON_STACK .endm .macro RESTORE_ABI_STATE
@@ -41,11 +43,11 @@ .endm .macro RESTORE_RET_ABI_STATE - REG_L ra, 3*SZREG(sp) - REG_L s0, 2*SZREG(sp) - REG_L a0, 1*SZREG(sp) - REG_L a1, 0*SZREG(sp) - addi sp, sp, 4*SZREG + REG_L ra, 1*SZREG(sp) + REG_L s0, 8*SZREG(sp) + REG_L a0, 10*SZREG(sp) + REG_L a1, 11*SZREG(sp) + addi sp, sp, ABI_SIZE_ON_STACK .endm SYM_TYPED_FUNC_START(ftrace_stub)
arch/riscv/kernel/vector.c +8 -4
@@ -99,8 +99,8 @@ static bool insn_is_vector(u32 insn_buf)return false; } -static int riscv_v_thread_zalloc (struct kmem_cache *cache, -struct __riscv_v_ext_state *ctx) +static int riscv_v_thread_ctx_alloc (struct kmem_cache *cache, +struct __riscv_v_ext_state *ctx) {void *datap;
@@ -110,13 +110,15 @@ static int riscv_v_thread_zalloc(struct kmem_cache *cache, ctx->datap = datap;memset (ctx,0 , offsetof(struct __riscv_v_ext_state , datap)); + ctx->vlenb = riscv_v_vsize /32 ; +return 0 ; }void riscv_v_thread_alloc (struct task_struct *tsk) {#ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE -riscv_v_thread_zalloc (riscv_v_kernel_cachep, &tsk->thread.kernel_vstate); +riscv_v_thread_ctx_alloc (riscv_v_kernel_cachep, &tsk->thread.kernel_vstate);#endif }
@@ -202,12 +204,14 @@ bool riscv_v_first_use_handler(struct pt_regs *regs)* context where VS has been off. So, try to allocate the user's V * context and resume execution. */ -if (riscv_v_thread_zalloc (riscv_v_user_cachep, ¤t->thread.vstate)) { +if (riscv_v_thread_ctx_alloc (riscv_v_user_cachep, ¤t->thread.vstate)) {force_sig (SIGBUS );return true; } +riscv_v_vstate_on (regs);riscv_v_vstate_set_restore (current, regs); +return true; }
arch/s390/Kconfig +3 -2
@@ -184,7 +184,7 @@ config S390 select HAVE_FTRACE_MCOUNT_RECORD select HAVE_FUNCTION_ARG_ACCESS_API select HAVE_FUNCTION_ERROR_INJECTION - select HAVE_FUNCTION_GRAPH_RETVAL + select HAVE_FUNCTION_GRAPH_FREGS select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_TRACER select HAVE_GCC_PLUGINS
@@ -239,6 +239,7 @@ config S390 select SPARSE_IRQ select SWIOTLB select SYSCTL_EXCEPTION_TRACE + select SYSTEM_DATA_VERIFICATION if KEXEC_SIG select THREAD_INFO_IN_TASK select TRACE_IRQFLAGS_SUPPORT select TTY
@@ -264,7 +265,7 @@ config ARCH_SUPPORTS_KEXEC_FILE def_bool y config ARCH_SUPPORTS_KEXEC_SIG - def_bool MODULE_SIG_FORMAT + def_bool y config ARCH_SUPPORTS_KEXEC_PURGATORY def_bool y
arch/s390/include/asm/ftrace.h +15 -40
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arch/s390/kernel/asm-offsets.c +2 -8
@@ -179,14 +179,8 @@ int main(void)DEFINE (OLDMEM_SIZE ,PARMAREA + offsetof(struct parmarea , oldmem_size));DEFINE (COMMAND_LINE ,PARMAREA + offsetof(struct parmarea , command_line));DEFINE (MAX_COMMAND_LINE_SIZE ,PARMAREA + offsetof(struct parmarea , max_command_line_size)); -#ifdef CONFIG_FUNCTION_GRAPH_TRACER -/* function graph return value tracing */ -OFFSET (__FGRAPH_RET_GPR2, fgraph_ret_regs, gpr2); -OFFSET (__FGRAPH_RET_FP, fgraph_ret_regs, fp); -DEFINE (__FGRAPH_RET_SIZE,sizeof (struct fgraph_ret_regs )); -#endif -OFFSET (__FTRACE_REGS_PT_REGS, ftrace_regs, regs); -DEFINE (__FTRACE_REGS_SIZE,sizeof (struct ftrace_regs )); +OFFSET (__FTRACE_REGS_PT_REGS, __arch_ftrace_regs, regs); +DEFINE (__FTRACE_REGS_SIZE,sizeof (struct __arch_ftrace_regs ));OFFSET (__PCPU_FLAGS, pcpu, flags);return 0 ;
arch/s390/kernel/ftrace.c +1 -1
@@ -318,7 +318,7 @@ void kprobe_ftrace_handler(unsigned long ip, unsigned long parent_ip,if (bit <0 )return ; -kmsan_unpoison_memory (fregs,sizeof (*fregs)); +kmsan_unpoison_memory (fregs,ftrace_regs_size ()); regs =ftrace_get_regs (fregs); p =get_kprobe ((kprobe_opcode_t *)ip);if (!regs ||unlikely (!p) ||kprobe_disabled (p))
arch/s390/kernel/mcount.S +6 -6
@@ -134,14 +134,14 @@ SYM_CODE_END(ftrace_common) SYM_FUNC_START(return_to_handler) stmg %r2,%r5,32(%r15) lgr %r1,%r15 - aghi %r15,-(STACK_FRAME_OVERHEAD+__FGRAPH_RET_SIZE) + # allocate ftrace_regs and stack frame for ftrace_return_to_handler + aghi %r15,-STACK_FRAME_SIZE_FREGS stg %r1,__SF_BACKCHAIN(%r15) - la %r3,STACK_FRAME_OVERHEAD(%r15) - stg %r1,__FGRAPH_RET_FP(%r3) - stg %r2,__FGRAPH_RET_GPR2(%r3) - lgr %r2,%r3 + stg %r2,(STACK_FREGS_PTREGS_GPRS+2*8)(%r15) + stg %r1,(STACK_FREGS_PTREGS_GPRS+15*8)(%r15) + la %r2,STACK_FRAME_OVERHEAD(%r15) brasl %r14,ftrace_return_to_handler - aghi %r15,STACK_FRAME_OVERHEAD+__FGRAPH_RET_SIZE + aghi %r15,STACK_FRAME_SIZE_FREGS lgr %r14,%r2 lmg %r2,%r5,32(%r15) BR_EX %r14
arch/s390/kernel/perf_cpum_sf.c +1 -1
@@ -856,7 +856,7 @@ static bool is_callchain_event(struct perf_event *event)u64 sample_type = event->attr.sample_type;return sample_type & (PERF_SAMPLE_CALLCHAIN |PERF_SAMPLE_REGS_USER | -PERF_SAMPLE_STACK_USER ); +PERF_SAMPLE_REGS_INTR |PERF_SAMPLE_STACK_USER ); }static int cpumsf_pmu_event_init (struct perf_event *event)
arch/s390/lib/test_unwind.c +2 -2
@@ -270,9 +270,9 @@ static void notrace __used test_unwind_ftrace_handler(unsigned long ip,struct ftrace_ops *fops, struct ftrace_regs *fregs) { - struct unwindme *u = (struct unwindme *)fregs->regs.gprs[2]; + struct unwindme *u = (struct unwindme *)arch_ftrace_regs(fregs)->regs.gprs[2]; - u->ret =test_unwind (NULL , (u->flags &UWM_REGS ) ? &fregs->regs :NULL , + u->ret =test_unwind (NULL , (u->flags &UWM_REGS ) ? &arch_ftrace_regs (fregs)->regs :NULL , (u->flags &UWM_SP ) ? u->sp :0 ); }
arch/s390/pci/pci.c +17 -8
@@ -232,24 +232,33 @@ int zpci_fmb_disable_device(struct zpci_dev *zdev)static int zpci_cfg_load (struct zpci_dev *zdev,int offset,u32 *val,u8 len) {u64 req =ZPCI_CREATE_REQ (zdev->fh,ZPCI_PCIAS_CFGSPC , len); +int rc = -ENODEV ;u64 data; -int rc; + +if (!zdev_enabled (zdev)) + goto out_err; rc =__zpci_load (&data, req, offset); -if (!rc) { - data =le64_to_cpu ((__force __le64 ) data); - data >>= (8 - len) *8 ; - *val = (u32 ) data; - }else - *val =0xffffffff ; +if (rc) + goto out_err; + data =le64_to_cpu ((__force __le64 )data); + data >>= (8 - len) *8 ; + *val = (u32 )data; +return 0 ; + +out_err: +PCI_SET_ERROR_RESPONSE (val);return rc; }static int zpci_cfg_store (struct zpci_dev *zdev,int offset,u32 val,u8 len) {u64 req =ZPCI_CREATE_REQ (zdev->fh,ZPCI_PCIAS_CFGSPC , len); +int rc = -ENODEV ;u64 data = val; -int rc; + +if (!zdev_enabled (zdev)) +return rc; data <<= (8 - len) *8 ; data = (__force u64 )cpu_to_le64 (data);
arch/s390/purgatory/Makefile +1 -0
@@ -21,6 +21,7 @@ KBUILD_CFLAGS += -fno-stack-protector KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING KBUILD_CFLAGS += $(CLANG_FLAGS) KBUILD_CFLAGS += $(call cc-option,-fno-PIE) +KBUILD_CFLAGS += $(call cc-option, -Wno-default-const-init-unsafe) KBUILD_AFLAGS := $(filter-out -DCC_USING_EXPOLINE,$(KBUILD_AFLAGS)) # Since we link purgatory with -r unresolved symbols are not checked, so we
arch/sparc/include/uapi/asm/ioctls.h +4 -4
@@ -5,10 +5,10 @@#include <asm/ioctl.h> /* Big T */ -#define TCGETA _IOR('T', 1, struct termio) -#define TCSETA _IOW('T', 2, struct termio) -#define TCSETAW _IOW('T', 3, struct termio) -#define TCSETAF _IOW('T', 4, struct termio) +#define TCGETA 0x40125401/* _IOR('T', 1, struct termio) */ +#define TCSETA 0x80125402/* _IOW('T', 2, struct termio) */ +#define TCSETAW 0x80125403/* _IOW('T', 3, struct termio) */ +#define TCSETAF 0x80125404/* _IOW('T', 4, struct termio) */ #define TCSBRK _IO('T', 5)#define TCXONC _IO('T', 6)#define TCFLSH _IO('T', 7)
arch/sparc/kernel/process.c +24 -14
@@ -17,14 +17,18 @@asmlinkage long sparc_fork (struct pt_regs *regs) { -unsigned long orig_i1 = regs->u_regs[UREG_I1 ]; +unsigned long orig_i1;long ret;struct kernel_clone_args args = { .exit_signal =SIGCHLD , -/* Reuse the parent's stack for the child. */ - .stack = regs->u_regs[UREG_FP ], }; +synchronize_user_stack (); + + orig_i1 = regs->u_regs[UREG_I1 ]; +/* Reuse the parent's stack for the child. */ + args.stack = regs->u_regs[UREG_FP ]; + ret =kernel_clone (&args);/* If we get an error and potentially restart the system
@@ -40,16 +44,19 @@ asmlinkage long sparc_fork(struct pt_regs *regs)asmlinkage long sparc_vfork (struct pt_regs *regs) { -unsigned long orig_i1 = regs->u_regs[UREG_I1 ]; +unsigned long orig_i1;long ret; -struct kernel_clone_args args = { .flags =CLONE_VFORK |CLONE_VM , .exit_signal =SIGCHLD , -/* Reuse the parent's stack for the child. */ - .stack = regs->u_regs[UREG_FP ], }; +synchronize_user_stack (); + + orig_i1 = regs->u_regs[UREG_I1 ]; +/* Reuse the parent's stack for the child. */ + args.stack = regs->u_regs[UREG_FP ]; + ret =kernel_clone (&args);/* If we get an error and potentially restart the system
@@ -65,15 +72,18 @@ asmlinkage long sparc_vfork(struct pt_regs *regs)asmlinkage long sparc_clone (struct pt_regs *regs) { -unsigned long orig_i1 = regs->u_regs[UREG_I1 ]; -unsigned int flags =lower_32_bits (regs->u_regs[UREG_I0 ]); +unsigned long orig_i1; +unsigned int flags;long ret; +struct kernel_clone_args args = {0 }; -struct kernel_clone_args args = { - .flags = (flags & ~CSIGNAL ), - .exit_signal = (flags &CSIGNAL ), - .tls = regs->u_regs[UREG_I3 ], - }; +synchronize_user_stack (); + + orig_i1 = regs->u_regs[UREG_I1 ]; + flags =lower_32_bits (regs->u_regs[UREG_I0 ]); + args.flags = (flags & ~CSIGNAL ); + args.exit_signal = (flags &CSIGNAL ); + args.tls = regs->u_regs[UREG_I3 ];#ifdef CONFIG_COMPAT if (test_thread_flag (TIF_32BIT )) {
arch/x86/Kconfig +1 -1
@@ -231,7 +231,7 @@ config X86 select HAVE_GUP_FAST select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE select HAVE_FTRACE_MCOUNT_RECORD - select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER + select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) select HAVE_FUNCTION_TRACER select HAVE_GCC_PLUGINS
arch/x86/events/core.c +2 -2
@@ -3051,8 +3051,8 @@ void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap) cap->version = x86_pmu.version; cap->num_counters_gp =x86_pmu_num_counters (NULL ); cap->num_counters_fixed =x86_pmu_num_counters_fixed (NULL ); - cap->bit_width_gp = x86_pmu.cntval_bits; - cap->bit_width_fixed = x86_pmu.cntval_bits; + cap->bit_width_gp = cap->num_counters_gp ? x86_pmu.cntval_bits :0 ; + cap->bit_width_fixed = cap->num_counters_fixed ? x86_pmu.cntval_bits :0 ; cap->events_mask = (unsigned int )x86_pmu.events_maskl; cap->events_mask_len = x86_pmu.events_mask_len; cap->pebs_ept = x86_pmu.pebs_ept;
arch/x86/events/intel/cstate.c +1 -0
@@ -597,6 +597,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {X86_MATCH_VFM (INTEL_ATOM_SILVERMONT , &slm_cstates),X86_MATCH_VFM (INTEL_ATOM_SILVERMONT_D , &slm_cstates),X86_MATCH_VFM (INTEL_ATOM_AIRMONT , &slm_cstates), +X86_MATCH_VFM (INTEL_ATOM_AIRMONT_NP , &slm_cstates),X86_MATCH_VFM (INTEL_BROADWELL , &snb_cstates), X86_MATCH_VFM(INTEL_BROADWELL_D, &snb_cstates),
arch/x86/events/msr.c +1 -0
@@ -76,6 +76,7 @@ static bool test_intel(int idx, void *data)case INTEL_ATOM_SILVERMONT :case INTEL_ATOM_SILVERMONT_D :case INTEL_ATOM_AIRMONT : +case INTEL_ATOM_AIRMONT_NP :case INTEL_ATOM_GOLDMONT :case INTEL_ATOM_GOLDMONT_D :
arch/x86/hyperv/hv_vtl.c +5 -3
@@ -68,7 +68,7 @@ static void hv_vtl_ap_entry(void)static int hv_vtl_bringup_vcpu (u32 target_vp_index,int cpu,u64 eip_ignored) { -u64 status; +u64 status, rsp, rip;int ret =0 ;struct hv_enable_vp_vtl *input;unsigned long irq_flags;
@@ -81,9 +81,11 @@ static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored)struct desc_struct *gdt;struct task_struct *idle =idle_thread_get (cpu); -u64 rsp = (unsigned long )idle->thread.sp; +if (IS_ERR (idle)) +return PTR_ERR (idle); -u64 rip = (u64)&hv_vtl_ap_entry; + rsp = (unsigned long )idle->thread.sp; + rip = (u64)&hv_vtl_ap_entry;native_store_gdt (&gdt_ptr);store_idt (&idt_ptr);
arch/x86/include/asm/ftrace.h +19 -43
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arch/x86/kernel/ftrace.c +1 -1
@@ -647,7 +647,7 @@ void prepare_ftrace_return(unsigned long ip, unsigned long *parent,void ftrace_graph_func (unsigned long ip,unsigned long parent_ip,struct ftrace_ops *op,struct ftrace_regs *fregs) { -struct pt_regs *regs = &fregs->regs; +struct pt_regs *regs = &arch_ftrace_regs (fregs)->regs;unsigned long *stack = (unsigned long *)kernel_stack_pointer (regs);prepare_ftrace_return (ip, (unsigned long *)stack,0 );
arch/x86/kernel/ftrace_32.S +7 -6
@@ -187,14 +187,15 @@ SYM_CODE_END(ftrace_graph_caller) .globl return_to_handler return_to_handler: - pushl $0 - pushl %edx - pushl %eax + subl $(PTREGS_SIZE), %esp + movl $0, PT_EBP(%esp) + movl %edx, PT_EDX(%esp) + movl %eax, PT_EAX(%esp) movl %esp, %eax call ftrace_return_to_handler movl %eax, %ecx - popl %eax - popl %edx - addl $4, %esp # skip ebp + movl PT_EAX(%esp), %eax + movl PT_EDX(%esp), %edx + addl $(PTREGS_SIZE), %esp JMP_NOSPEC ecx #endif
arch/x86/kernel/ftrace_64.S +15 -8
@@ -348,21 +348,28 @@ STACK_FRAME_NON_STANDARD_FP(__fentry__) SYM_CODE_START(return_to_handler) UNWIND_HINT_UNDEFINED ANNOTATE_NOENDBR - subq $24, %rsp - /* Save the return values */ - movq %rax, (%rsp) - movq %rdx, 8(%rsp) - movq %rbp, 16(%rsp) + /* Restore return_to_handler value that got eaten by previous ret instruction. */ + subq $8, %rsp + UNWIND_HINT_FUNC + + /* Save ftrace_regs for function exit context */ + subq $(FRAME_SIZE), %rsp + + movq %rax, RAX(%rsp) + movq %rdx, RDX(%rsp) + movq %rbp, RBP(%rsp) + movq %rsp, RSP(%rsp) movq %rsp, %rdi call ftrace_return_to_handler movq %rax, %rdi - movq 8(%rsp), %rdx - movq (%rsp), %rax + movq RDX(%rsp), %rdx + movq RAX(%rsp), %rax + + addq $(FRAME_SIZE) + 8, %rsp - addq $24, %rsp /* * Jump back to the old return address. This cannot be JMP_NOSPEC rdi * since IBT would demand that contain ENDBR, which simply isn't so for
arch/x86/kernel/kexec-bzimage64.c +7 -0
@@ -184,6 +184,13 @@ setup_efi_state(struct boot_params *params, unsigned long params_load_addr,struct efi_info *current_ei = &boot_params.efi_info;struct efi_info *ei = ¶ms->efi_info; +if (!params->acpi_rsdp_addr) { +if (efi.acpi20 !=EFI_INVALID_TABLE_ADDR ) + params->acpi_rsdp_addr = efi.acpi20; +else if (efi.acpi !=EFI_INVALID_TABLE_ADDR ) + params->acpi_rsdp_addr = efi.acpi; + } +if (!efi_enabled (EFI_RUNTIME_SERVICES ))return 0 ;
arch/x86/kernel/setup.c +6 -0
@@ -372,9 +372,15 @@ int __init ima_free_kexec_buffer(void)int __init ima_get_kexec_buffer (void **addr,size_t *size) { +int ret; +if (!ima_kexec_buffer_size)return -ENOENT ; + ret =ima_validate_range (ima_kexec_buffer_phys, ima_kexec_buffer_size); +if (ret) +return ret; + *addr =__va (ima_kexec_buffer_phys); *size = ima_kexec_buffer_size;
arch/x86/kvm/svm/nested.c +1 -2
@@ -1760,10 +1760,9 @@ static int svm_set_nested_state(struct kvm_vcpu *vcpu,* thus MMU might not be initialized correctly. * Set it again to fix this. */ - ret =nested_svm_load_cr3 (&svm->vcpu, vcpu->arch.cr3,nested_npt_enabled (svm), false); -if (WARN_ON_ONCE (ret)) +if (ret) goto out_free; svm->nested.force_msr_bitmap_recalc = true;
arch/x86/kvm/svm/svm.c +3 -2
@@ -2358,12 +2358,13 @@ static int vmload_vmsave_interception(struct kvm_vcpu *vcpu, bool vmload) ret =kvm_skip_emulated_instruction (vcpu); +/* KVM always performs VMLOAD/VMSAVE on VMCB01 (see __svm_vcpu_run()) */ if (vmload) { -svm_copy_vmloadsave_state (svm->vmcb, vmcb12); +svm_copy_vmloadsave_state (svm->vmcb01.ptr, vmcb12); svm->sysenter_eip_hi =0 ; svm->sysenter_esp_hi =0 ; }else { -svm_copy_vmloadsave_state (vmcb12, svm->vmcb); +svm_copy_vmloadsave_state (vmcb12, svm->vmcb01.ptr); }kvm_vcpu_unmap (vcpu, &map, true);
arch/x86/kvm/x86.c +22 -20
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drivers/acpi/acpica/exoparg3.c +18 -28
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drivers/ata/libata-scsi.c +53 -31
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drivers/char/hw_random/core.c +109 -64
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drivers/crypto/hisilicon/sec2/sec_crypto.c +47 -15
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drivers/crypto/hisilicon/zip/zip_crypto.c +9 -15
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drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c +10 -0
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drivers/crypto/marvell/octeontx/otx_cptvf_main.c +2 -1
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drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c +23 -22
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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +35 -9
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drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c +37 -6
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drivers/mtd/nand/raw/cadence-nand-controller.c +1 -1
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drivers/net/ethernet/broadcom/bnxt/bnxt.c +7 -6
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Sasha,
1. I cannot find this commit posted on lore.kernel.org to report to exact patch.
| From: Matt Roper <[email protected]> | Date: Tue, 10 Sep 2024 16:47:29 -0700 | Subject: [PATCH 6.12/sisyphus] drm/xe: Switch MMIO interface to take xe_mmio | instead of xe_gt | | [ Upstream commit a84590c5ceb354d2e9f7f6812cfb3a9709e14afa ] | | Since much of the MMIO register access done by the driver is to non-GT | registers, use of 'xe_gt' in these interfaces has been a long-standing | design flaw that's been hard to disentangle. | | To avoid a flag day across the whole driver, munge the function names | and add temporary compatibility macros with the original function names | that can accept either the new xe_mmio or the old xe_gt structure as a | parameter. This will allow us to slowly convert parts of the driver | over to the new interface independently. | | Signed-off-by: Matt Roper <[email protected]> | Reviewed-by: Rodrigo Vivi <[email protected]> | Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] | Stable-dep-of: 4a9b4e1fa52a ("drm/xe/mmio: Avoid double-adjust in 64-bit reads") | Signed-off-by: Sasha Levin <[email protected]> | --- | drivers/gpu/drm/xe/xe_mmio.h | 72 +++++++++++++++---- | drivers/gpu/drm/xe/xe_trace.h | 7 +- | drivers/gpu/drm/xe/xe_mmio.c | 131 ++++++++++++++++------------------ | 3 files changed, 124 insertions(+), 86 deletions(-)
2. After this patch applied to 6.12.75 there is kernel NULL pointer dereference BUG on MSI MAG H670 12th Gen Intel(R) Core(TM) i5-12600K with ASRock Intel Arc B580 Challenger [Alchemist], 12GB:
BUG: kernel NULL pointer dereference, address: 0000000000000000 #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page PGD 0 P4D 0 Oops: Oops: 0000 [#1] PREEMPT SMP NOPTI CPU: 8 UID: 0 PID: 310 Comm: (udev-worker) Not tainted 6.12.79-6.12-alt1 #1 Hardware name: Micro-Star International Co., Ltd. MS-7D25/MAG H670 TOMAHAWK WIFI DDR4(MS-7D25), BIOS H.N0 07/31/2025 RIP: 0010:__xe_mmio_read32+0x23/0xe0 [xe]
The commit is found not by a git bisect (since it's reported by end user and I cannot reproduce it on my hardware) but (by analyzing dmesg) with:
(gdb) list *__xe_mmio_read32+0x23
0x35723 is in __xe_mmio_read32 (drivers/gpu/drm/xe/xe_mmio.c:195).
190 static void mmio_flush_pending_writes(struct xe_mmio *mmio)
191 {
192 #define DUMMY_REG_OFFSET 0x130030 193 int i;
194
195 if (mmio->tile->xe->info.platform != XE_LUNARLAKE)
196 return;
197
198 /* 4 dummy writes */
199 for (i = 0; i < 4; i++)
Then finding the suspecting commit:
$ git log --oneline -G'XE_LUNARLAKE' v6.12.74..v6.12.75 26a40327c25c drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt
6.18 and above are not affected by the bug. Also, they have another commit modifying the line which is not present in 6.12 branch:
ac596dee8008 drm/xe: Move Wa_15015404425 to use the new XE_DEVICE_WA macro
Thanks,
#regzbot introduced: v6.12.75
Related drm/xe bug report https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/7661
Quoted 22 lines · Sasha Levin
drivers/gpu/drm/xe/xe_mmio.c +3
-4@@ -172,122 +180,118 @@ int xe_mmio_init(struct xe_device *xe) -static void mmio_flush_pending_writes (struct xe_gt *gt) +static void mmio_flush_pending_writes (struct xe_mmio *mmio) {#define DUMMY_REG_OFFSET 0x130030 -struct xe_tile *tile =gt_to_tile (gt);int i; -if (tile->xe->info.platform !=XE_LUNARLAKE ) +if (mmio->tile->xe->info.platform !=XE_LUNARLAKE )return ;/* 4 dummy writes */ for (i =0 ; i <4 ; i++) -writel (0 , tile->mmio.regs +DUMMY_REG_OFFSET ); +writel (0 , mmio->regs +DUMMY_REG_OFFSET ); }
Quoted 27 lines · Vitaly Chikunov
Sasha,
1. I cannot find this commit posted on lore.kernel.org to report to exact patch.
| From: Matt Roper <[email protected]> | Date: Tue, 10 Sep 2024 16:47:29 -0700 | Subject: [PATCH 6.12/sisyphus] drm/xe: Switch MMIO interface to take xe_mmio | instead of xe_gt | | [ Upstream commit a84590c5ceb354d2e9f7f6812cfb3a9709e14afa ] | | Since much of the MMIO register access done by the driver is to non-GT | registers, use of 'xe_gt' in these interfaces has been a long-standing | design flaw that's been hard to disentangle.[...]
2. After this patch applied to 6.12.75 there is kernel NULL pointer dereference BUG on MSI MAG H670 12th Gen Intel(R) Core(TM) i5-12600K with ASRock Intel Arc B580 Challenger [Alchemist], 12GB:
[...]
The commit is found not by a git bisect (since it's reported by end user and I cannot reproduce it on my hardware) but (by analyzing dmesg) with:
[...]
Then finding the suspecting commit:
Quoted 7 lines
$ git log --oneline -G'XE_LUNARLAKE' v6.12.74..v6.12.75 26a40327c25c drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt6.18 and above are not affected by the bug. Also, they have another commit modifying the line which is not present in 6.12 branch:
[...]
Related drm/xe bug report https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/7661
Nobody reacted to this and it seems the gitlab ticket is stalled, too. So let me ask: can this be resolved by reverting 26a40327c25c in 6.12.y?
Ciao, Thorsten
Thorsten, Sasha,
Quoted 31 lines · Thorsten Leemhuis
Quoted 30 lines · Vitaly Chikunov
Sasha,
1. I cannot find this commit posted on lore.kernel.org to report to exact patch.
| From: Matt Roper <[email protected]> | Date: Tue, 10 Sep 2024 16:47:29 -0700 | Subject: [PATCH 6.12/sisyphus] drm/xe: Switch MMIO interface to take xe_mmio | instead of xe_gt | | [ Upstream commit a84590c5ceb354d2e9f7f6812cfb3a9709e14afa ] | | Since much of the MMIO register access done by the driver is to non-GT | registers, use of 'xe_gt' in these interfaces has been a long-standing | design flaw that's been hard to disentangle.[...]
2. After this patch applied to 6.12.75 there is kernel NULL pointer dereference BUG on MSI MAG H670 12th Gen Intel(R) Core(TM) i5-12600K with ASRock Intel Arc B580 Challenger [Alchemist], 12GB:
[...]
The commit is found not by a git bisect (since it's reported by end user and I cannot reproduce it on my hardware) but (by analyzing dmesg) with:
[...]
Then finding the suspecting commit:$ git log --oneline -G'XE_LUNARLAKE' v6.12.74..v6.12.75 26a40327c25c drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt
Quoted 6 lines
Quoted 4 lines
6.18 and above are not affected by the bug. Also, they have another commit modifying the line which is not present in 6.12 branch:
[...]
Related drm/xe bug report https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/7661Nobody reacted to this and it seems the gitlab ticket is stalled, too. So let me ask: can this be resolved by reverting
26a40327c25cin 6.12.y?
As of me, this is not easy to revert, as it depends on many other commits, and git does not have tooling to determine all dependant commits for revert. I hope someone from drm subsystem notices this to work on it, or Sasha can pull missing commits or revert this (obviously, he have tooling for this, but I was unable to find it). [I found obsolete references to deps but is seems not used for years and Python git-deps tool seems broken.]
What I found is, offending commit is picked due to
Stable-dep-of: 4a9b4e1fa52a ("drm/xe/mmio: Avoid double-adjust in 64-bit reads")
Which, perhaps, needs to be reverted.
Offending commit 26a40327c25c is not tracked in lore.
It's part of 9 piece patchset, perhaps they are logically dependent too, so need to be reverted together.
The possible fix is part of 6 piece patchset, which does not cherry-pick easily due to conflicts.
If someone can produce correct fix we can participate in the tests.
Thanks,
Quoted 2 lines
Ciao, Thorsten
Thorsten,
Quoted 40 lines · Vitaly Chikunov
Thorsten, Sasha,
Quoted 37 lines · Thorsten Leemhuis
Quoted 27 lines · Vitaly Chikunov
Sasha,
1. I cannot find this commit posted on lore.kernel.org to report to exact patch.
| From: Matt Roper <[email protected]> | Date: Tue, 10 Sep 2024 16:47:29 -0700 | Subject: [PATCH 6.12/sisyphus] drm/xe: Switch MMIO interface to take xe_mmio | instead of xe_gt | | [ Upstream commit a84590c5ceb354d2e9f7f6812cfb3a9709e14afa ] | | Since much of the MMIO register access done by the driver is to non-GT | registers, use of 'xe_gt' in these interfaces has been a long-standing | design flaw that's been hard to disentangle.[...]
2. After this patch applied to 6.12.75 there is kernel NULL pointer dereference BUG on MSI MAG H670 12th Gen Intel(R) Core(TM) i5-12600K with ASRock Intel Arc B580 Challenger [Alchemist], 12GB:
[...]
The commit is found not by a git bisect (since it's reported by end user and I cannot reproduce it on my hardware) but (by analyzing dmesg) with:
[...]
Then finding the suspecting commit:Quoted 7 lines
$ git log --oneline -G'XE_LUNARLAKE' v6.12.74..v6.12.75 26a40327c25c drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt6.18 and above are not affected by the bug. Also, they have another commit modifying the line which is not present in 6.12 branch:
[...]
Related drm/xe bug report https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/7661Nobody reacted to this and it seems the gitlab ticket is stalled, too. So let me ask: can this be resolved by reverting
26a40327c25cin 6.12.y?
It's turned out these two commits are revertible together:
8f6848b2f6ea ("drm/xe/mmio: Avoid double-adjust in 64-bit reads") 26a40327c25c ("drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt")
I am going to ask the users to test this.
Thanks,
Quoted 28 lines
As of me, this is not easy to revert, as it depends on many other commits, and git does not have tooling to determine all dependant commits for revert. I hope someone from drm subsystem notices this to work on it, or Sasha can pull missing commits or revert this (obviously, he have tooling for this, but I was unable to find it). [I found obsolete references to deps but is seems not used for years and Python git-deps tool seems broken.]
What I found is, offending commit is picked due to
Stable-dep-of:
4a9b4e1fa52a("drm/xe/mmio: Avoid double-adjust in 64-bit reads")Which, perhaps, needs to be reverted.
Offending commit
26a40327c25cis not tracked in lore.
It's part of 9 piece patchset, perhaps they are logically dependent too, so need to be reverted together.The possible fix is part of 6 piece patchset, which does not cherry-pick easily due to conflicts.
If someone can produce correct fix we can participate in the tests.
Thanks,
Quoted 2 lines
Ciao, Thorsten
Thorsten, Sasha,
Quoted 39 lines · Vitaly Chikunov
Quoted 31 lines · Vitaly Chikunov
Quoted 30 lines · Thorsten Leemhuis
Quoted 29 lines · Vitaly Chikunov
1. I cannot find this commit posted on lore.kernel.org to report to exact patch.
| From: Matt Roper <[email protected]> | Date: Tue, 10 Sep 2024 16:47:29 -0700 | Subject: [PATCH 6.12/sisyphus] drm/xe: Switch MMIO interface to take xe_mmio | instead of xe_gt | | [ Upstream commit a84590c5ceb354d2e9f7f6812cfb3a9709e14afa ] | | Since much of the MMIO register access done by the driver is to non-GT | registers, use of 'xe_gt' in these interfaces has been a long-standing | design flaw that's been hard to disentangle.[...]
2. After this patch applied to 6.12.75 there is kernel NULL pointer dereference BUG on MSI MAG H670 12th Gen Intel(R) Core(TM) i5-12600K with ASRock Intel Arc B580 Challenger [Alchemist], 12GB:
[...]
The commit is found not by a git bisect (since it's reported by end user and I cannot reproduce it on my hardware) but (by analyzing dmesg) with:
[...]
Then finding the suspecting commit:$ git log --oneline -G'XE_LUNARLAKE' v6.12.74..v6.12.75 26a40327c25c drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gtQuoted 6 lines
Quoted 6 lines
Quoted 4 lines
6.18 and above are not affected by the bug. Also, they have another commit modifying the line which is not present in 6.12 branch:
[...]
Related drm/xe bug report https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/7661Nobody reacted to this and it seems the gitlab ticket is stalled, too. So let me ask: can this be resolved by reverting
26a40327c25cin 6.12.y?
Quoted 6 lines
It's turned out these two commits are revertible together:
8f6848b2f6ea("drm/xe/mmio: Avoid double-adjust in 64-bit reads")26a40327c25c("drm/xe: Switch MMIO interface to takexe_mmioinstead ofxe_gt")I am going to ask the users to test this.
After testing revert of these two commits, users report that regress does not appear, kernel boots without panic and there is no video artifacts.
So, I kindly ask to revert them from 6.12.y branch if they aren't critical.
Thanks,
Quoted 31 lines
Thanks,
Quoted 28 lines
As of me, this is not easy to revert, as it depends on many other commits, and git does not have tooling to determine all dependant commits for revert. I hope someone from drm subsystem notices this to work on it, or Sasha can pull missing commits or revert this (obviously, he have tooling for this, but I was unable to find it). [I found obsolete references to deps but is seems not used for years and Python git-deps tool seems broken.]
What I found is, offending commit is picked due to
Stable-dep-of:
4a9b4e1fa52a("drm/xe/mmio: Avoid double-adjust in 64-bit reads")Which, perhaps, needs to be reverted.
Offending commit
26a40327c25cis not tracked in lore.
It's part of 9 piece patchset, perhaps they are logically dependent too, so need to be reverted together.The possible fix is part of 6 piece patchset, which does not cherry-pick easily due to conflicts.
If someone can produce correct fix we can participate in the tests.
Thanks,
Quoted 2 lines
Ciao, Thorsten
Thorsten, Sasha,
Quoted 42 lines · Vitaly Chikunov
Quoted 41 lines · Vitaly Chikunov
Quoted 31 lines · Vitaly Chikunov
Quoted 30 lines · Thorsten Leemhuis
Quoted 29 lines · Vitaly Chikunov
1. I cannot find this commit posted on lore.kernel.org to report to exact patch.
| From: Matt Roper <[email protected]> | Date: Tue, 10 Sep 2024 16:47:29 -0700 | Subject: [PATCH 6.12/sisyphus] drm/xe: Switch MMIO interface to take xe_mmio | instead of xe_gt | | [ Upstream commit a84590c5ceb354d2e9f7f6812cfb3a9709e14afa ] | | Since much of the MMIO register access done by the driver is to non-GT | registers, use of 'xe_gt' in these interfaces has been a long-standing | design flaw that's been hard to disentangle.[...]
2. After this patch applied to 6.12.75 there is kernel NULL pointer dereference BUG on MSI MAG H670 12th Gen Intel(R) Core(TM) i5-12600K with ASRock Intel Arc B580 Challenger [Alchemist], 12GB:
[...]
The commit is found not by a git bisect (since it's reported by end user and I cannot reproduce it on my hardware) but (by analyzing dmesg) with:
[...]
Then finding the suspecting commit:$ git log --oneline -G'XE_LUNARLAKE' v6.12.74..v6.12.75 26a40327c25c drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gtQuoted 6 lines
Quoted 6 lines
Quoted 4 lines
6.18 and above are not affected by the bug. Also, they have another commit modifying the line which is not present in 6.12 branch:
[...]
Related drm/xe bug report https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/7661Nobody reacted to this and it seems the gitlab ticket is stalled, too. So let me ask: can this be resolved by reverting
26a40327c25cin 6.12.y?It's turned out these two commits are revertible together:
Quoted 7 lines
Quoted 4 lines
8f6848b2f6ea("drm/xe/mmio: Avoid double-adjust in 64-bit reads")26a40327c25c("drm/xe: Switch MMIO interface to takexe_mmioinstead ofxe_gt")I am going to ask the users to test this.
After testing revert of these two commits, users report that regress does not appear, kernel boots without panic and there is no video artifacts.
After analyzing the problem slightly deeper, it seems that there is uninitialized mmio.tile issue. Which is fixed in mainline commit
58548b91101f ("drm/xe: Defer gt->mmio initialization until after multi-tile setup")
The commit also have tag:
The commit fa599b8c95a7 is picked into 6.12.75 as 0b433e086b9f, but the fix is not. Piking it may be the better way to fix the regression than the revert of the two aforementioned commits.
I will try to pick the fix, test, and report if it resolves the regress.
Thanks,
Quoted 37 lines
So, I kindly ask to revert them from 6.12.y branch if they aren't critical.
Thanks,
Quoted 31 lines
Thanks,
Quoted 28 lines
As of me, this is not easy to revert, as it depends on many other commits, and git does not have tooling to determine all dependant commits for revert. I hope someone from drm subsystem notices this to work on it, or Sasha can pull missing commits or revert this (obviously, he have tooling for this, but I was unable to find it). [I found obsolete references to deps but is seems not used for years and Python git-deps tool seems broken.]
What I found is, offending commit is picked due to
Stable-dep-of:
4a9b4e1fa52a("drm/xe/mmio: Avoid double-adjust in 64-bit reads")Which, perhaps, needs to be reverted.
Offending commit
26a40327c25cis not tracked in lore.
It's part of 9 piece patchset, perhaps they are logically dependent too, so need to be reverted together.The possible fix is part of 6 piece patchset, which does not cherry-pick easily due to conflicts.
If someone can produce correct fix we can participate in the tests.
Thanks,
Quoted 2 lines
Ciao, Thorsten
Thorsten, Sasha,
Quoted 48 lines · Vitaly Chikunov
Quoted 47 lines · Vitaly Chikunov
Quoted 45 lines · Vitaly Chikunov
Quoted 31 lines · Vitaly Chikunov
Quoted 30 lines · Thorsten Leemhuis
Quoted 29 lines · Vitaly Chikunov
1. I cannot find this commit posted on lore.kernel.org to report to exact patch.
| From: Matt Roper <[email protected]> | Date: Tue, 10 Sep 2024 16:47:29 -0700 | Subject: [PATCH 6.12/sisyphus] drm/xe: Switch MMIO interface to take xe_mmio | instead of xe_gt | | [ Upstream commit a84590c5ceb354d2e9f7f6812cfb3a9709e14afa ] | | Since much of the MMIO register access done by the driver is to non-GT | registers, use of 'xe_gt' in these interfaces has been a long-standing | design flaw that's been hard to disentangle.[...]
2. After this patch applied to 6.12.75 there is kernel NULL pointer dereference BUG on MSI MAG H670 12th Gen Intel(R) Core(TM) i5-12600K with ASRock Intel Arc B580 Challenger [Alchemist], 12GB:
[...]
The commit is found not by a git bisect (since it's reported by end user and I cannot reproduce it on my hardware) but (by analyzing dmesg) with:
[...]
Then finding the suspecting commit:$ git log --oneline -G'XE_LUNARLAKE' v6.12.74..v6.12.75 26a40327c25c drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gtQuoted 6 lines
Quoted 6 lines
Quoted 4 lines
6.18 and above are not affected by the bug. Also, they have another commit modifying the line which is not present in 6.12 branch:
[...]
Related drm/xe bug report https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/7661Nobody reacted to this and it seems the gitlab ticket is stalled, too. So let me ask: can this be resolved by reverting
26a40327c25cin 6.12.y?It's turned out these two commits are revertible together:
8f6848b2f6ea("drm/xe/mmio: Avoid double-adjust in 64-bit reads")26a40327c25c("drm/xe: Switch MMIO interface to takexe_mmioinstead ofxe_gt")I am going to ask the users to test this.
Quoted 7 lines
Quoted 2 lines
After testing revert of these two commits, users report that regress does not appear, kernel boots without panic and there is no video artifacts.
After analyzing the problem slightly deeper, it seems that there is uninitialized mmio.tile issue. Which is fixed in mainline commit
58548b91101f("drm/xe: Defergt->mmioinitialization until after multi-tile setup")
Applying this commit to v6.12.81 does not resolve the regress. Thus, I would suggest reverting commits 26a40327c25c and 8f6848b2f6ea.
Thanks,
Quoted 51 lines
The commit also have tag:
Fixes fa599b8c95a7 ("drm/xe: Populate GT's mmio iomap from tile during init")The commit
fa599b8c95a7is picked into 6.12.75 as0b433e086b9f, but the fix is not. Piking it may be the better way to fix the regression than the revert of the two aforementioned commits.I will try to pick the fix, test, and report if it resolves the regress.
Thanks,
Quoted 37 lines
So, I kindly ask to revert them from 6.12.y branch if they aren't critical.
Thanks,
Quoted 31 lines
Thanks,
Quoted 28 lines
As of me, this is not easy to revert, as it depends on many other commits, and git does not have tooling to determine all dependant commits for revert. I hope someone from drm subsystem notices this to work on it, or Sasha can pull missing commits or revert this (obviously, he have tooling for this, but I was unable to find it). [I found obsolete references to deps but is seems not used for years and Python git-deps tool seems broken.]
What I found is, offending commit is picked due to
Stable-dep-of:
4a9b4e1fa52a("drm/xe/mmio: Avoid double-adjust in 64-bit reads")Which, perhaps, needs to be reverted.
Offending commit
26a40327c25cis not tracked in lore.
It's part of 9 piece patchset, perhaps they are logically dependent too, so need to be reverted together.The possible fix is part of 6 piece patchset, which does not cherry-pick easily due to conflicts.
If someone can produce correct fix we can participate in the tests.
Thanks,
Quoted 2 lines
Ciao, Thorsten