FAILED: patch "[PATCH] pmdomain: imx8mp-blk-ctrl: Keep the NOC_HDCP clock enabled" failed to apply to 6.1-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 6.1-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.1.y
git checkout FETCH_HEAD
git cherry-pick -x e91d5f94acf68618ea3ad9c92ac28614e791ae7d
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026041342-shadow-unkempt-252a@gregkh' --subject-prefix 'PATCH 6.1.y' HEAD^..
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From e91d5f94acf68618ea3ad9c92ac28614e791ae7d Mon Sep 17 00:00:00 2001
From: Jacky Bai <[email protected]>
Date: Fri, 20 Mar 2026 16:43:46 +0800
Subject: [PATCH] pmdomain: imx8mp-blk-ctrl: Keep the NOC_HDCP clock enabled
Keep the NOC_HDCP clock always enabled to fix the potential hang caused by the NoC ADB400 port power down handshake.
drivers/pmdomain/imx/imx8mp-blk-ctrl.c +1 -7
@@ -352,9 +352,6 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc,regmap_set_bits (bc->regmap,HDMI_RTX_RESET_CTL0 ,BIT (12 ));regmap_clear_bits (bc->regmap,HDMI_TX_CONTROL0 ,BIT (3 ));break ; -case IMX8MP_HDMIBLK_PD_HDCP : -regmap_set_bits (bc->regmap,HDMI_RTX_CLK_CTL0 ,BIT (11 )); -break ;case IMX8MP_HDMIBLK_PD_HRV :regmap_set_bits (bc->regmap,HDMI_RTX_CLK_CTL1 ,BIT (3 ) |BIT (4 ) |BIT (5 ));regmap_set_bits (bc->regmap,HDMI_RTX_RESET_CTL0 ,BIT (15 ));
@@ -408,9 +405,6 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc,regmap_clear_bits (bc->regmap,HDMI_RTX_CLK_CTL0 ,BIT (7 ));regmap_clear_bits (bc->regmap,HDMI_RTX_CLK_CTL1 ,BIT (22 ) |BIT (24 ));break ; -case IMX8MP_HDMIBLK_PD_HDCP : -regmap_clear_bits (bc->regmap,HDMI_RTX_CLK_CTL0 ,BIT (11 )); -break ;case IMX8MP_HDMIBLK_PD_HRV :regmap_clear_bits (bc->regmap,HDMI_RTX_RESET_CTL0 ,BIT (15 ));regmap_clear_bits (bc->regmap,HDMI_RTX_CLK_CTL1 ,BIT (3 ) |BIT (4 ) |BIT (5 ));
@@ -439,7 +433,7 @@ static int imx8mp_hdmi_power_notifier(struct notifier_block *nb,regmap_write (bc->regmap,HDMI_RTX_CLK_CTL0 ,0x0 );regmap_write (bc->regmap,HDMI_RTX_CLK_CTL1 ,0x0 );regmap_set_bits (bc->regmap,HDMI_RTX_CLK_CTL0 , -BIT (0 ) |BIT (1 ) |BIT (10 )); +BIT (0 ) |BIT (1 ) |BIT (10 ) |BIT (11 ));regmap_set_bits (bc->regmap,HDMI_RTX_RESET_CTL0 ,BIT (0 ));/*