FAILED: patch "[PATCH] ARM: 9472/1: fix race condition on PG_dcache_clean in" failed to apply to 5.15-stable tree
Subsystems (2)
[email protected]
maintainerThe patch below does not apply to the 5.15-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.15.y
git checkout FETCH_HEAD
git cherry-pick -x 75f9a484e817adea211c73f89ed938a2b2f90953
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026050413-consoling-coauthor-12a3@gregkh' --subject-prefix 'PATCH 5.15.y' HEAD^..
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 75f9a484e817adea211c73f89ed938a2b2f90953 Mon Sep 17 00:00:00 2001
From: Brian Ruley <[email protected]>
Date: Wed, 15 Apr 2026 18:12:48 +0100
Subject: [PATCH] ARM: 9472/1: fix race condition on PG_dcache_clean in
__sync_icache_dcache()
This bug was already discovered and fixed for arm64 in commit 588a513d3425 ("arm64: Fix race condition on PG_dcache_clean in __sync_icache_dcache()").
Verified with added instrumentation to track dcache flushes in a ring buffer, as shown by the (distilled) output:
kernel: SIGILL at b6b80ac0 cpu 1 pid 32663 linux_pte=8eff659f
hw_pte=8eff6e7e young=1 exec=1
kernel: dcache flush START cpu0 pfn=8eff6 ts=48629557020154
kernel: dcache flush SKIPPED cpu1 pfn=8eff6 ts=48629557020154
kernel: dcache flush FINISH cpu0 pfn=8eff6 ts=48629557036154
audisp-syslog: comm="journalctl" exe="/usr/bin/journalctl" sig=4 [...]
Discussions in the mailing list mentioned that arch/arm is also affected but the fix was never applied to it [1][2]. Apply the change now, since the race condition can cause sporadic SIGILL's and SEGV's especially while under high memory pressure.
arch/arm/mm/flush.c +3 -1
@@ -304,8 +304,10 @@ void __sync_icache_dcache(pte_t pteval)else mapping =NULL ; -if (!test_and_set_bit (PG_dcache_clean, &folio->flags.f)) +if (!test_bit (PG_dcache_clean, &folio->flags.f)) {__flush_dcache_folio (mapping, folio); +set_bit (PG_dcache_clean, &folio->flags.f); + }if (pte_exec (pteval))__flush_icache_all ();