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Documentation/arch/x86/amd-memory-encryption.rst: Fix typo

PATCH Applied Cédric Hannotier 3 participants 3 messages Jul 4 – Jul 7

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#0 lore raw

PATCH 1/1 Documentation/arch/x86/amd-memory-encryption.rst: Fix typo

The MSR address has one 0 too many: 0xc00100010 → 0xc0010010.

---
 Documentation/arch/x86/amd-memory-encryption.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/arch/x86/amd-memory-encryption.rst +1 -1
index bd840df70..92edb26a5 100644
@@ -53,7 +53,7 @@ CPUID function 0x8000001f reports information related to SME::
 			   system physical addresses, not guest physical
 			   addresses)
 
-If support for SME is present, MSR 0xc00100010 (MSR_AMD64_SYSCFG) can be used to
+If support for SME is present, MSR 0xc0010010 (MSR_AMD64_SYSCFG) can be used to
 determine if SME is enabled and/or to enable memory encryption::
 
 	0xc0010010:
Signature · 1 line
2.54.0
#1 lore raw
The following commit has been merged into the x86/cleanups branch of tip:

The following commit has been merged into the x86/cleanups branch of tip:

Commit-ID:     db55777feca876dd2a548a232abeb3ddd8986a09
Gitweb:        https://git.kernel.org/tip/db55777feca876dd2a548a232abeb3ddd8986a09
Author:        Cédric Hannotier <[email protected]>
AuthorDate:    Sat, 04 Jul 2026 14:55:15 +02:00
Committer:     Borislav Petkov (AMD) <[email protected]>
CommitterDate: Sat, 04 Jul 2026 11:09:12 -07:00

Documentation/arch/x86/amd-memory-encryption.rst: Fix typo

The MSR address has one 0 too many: 0xc00100010 → 0xc0010010.

---
 Documentation/arch/x86/amd-memory-encryption.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/arch/x86/amd-memory-encryption.rst +1 -1
index bd840df..92edb26 100644
@@ -53,7 +53,7 @@ CPUID function 0x8000001f reports information related to SME::
 			   system physical addresses, not guest physical
 			   addresses)
 
-If support for SME is present, MSR 0xc00100010 (MSR_AMD64_SYSCFG) can be used to
+If support for SME is present, MSR 0xc0010010 (MSR_AMD64_SYSCFG) can be used to
 determine if SME is enabled and/or to enable memory encryption::
 
 	0xc0010010:
reviewer Acked-by on v1 1/1
#2 lore raw
In reply to Cédric Hannotier
Quoted 3 lines · Cédric Hannotier

The MSR address has one 0 too many: 0xc00100010 → 0xc0010010.

Thanks.

Quoted 17 lines
---
 Documentation/arch/x86/amd-memory-encryption.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Documentation/arch/x86/amd-memory-encryption.rst +1 -1
index bd840df70..92edb26a5 100644
@@ -53,7 +53,7 @@ CPUID function 0x8000001f reports information related to SME::
 			   system physical addresses, not guest physical
 			   addresses)
 
-If support for SME is present, MSR 0xc00100010 (MSR_AMD64_SYSCFG) can be used to
+If support for SME is present, MSR 0xc0010010 (MSR_AMD64_SYSCFG) can be used to
 determine if SME is enabled and/or to enable memory encryption::
 
 	0xc0010010:
Signature · 1 line
~Randy