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pinctrl: qcom: ipq806x: mark gpio and pcie-reset as GPIO

PATCH Applied Hans Ulli Kroll 5 participants 11 messages Jul 19 – Jul 28

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#0 lore raw

cover pinctrl: qcom: ipq806x: mark gpio and pcie-reset as GPIO

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

ipq806x still describes its gpio function with QCA_PIN_FUNCTION(gpio), so it is not treated as a GPIO pin function. As a result, GPIO consumers can still conflict with pinctrl states that select the "gpio" function.

This allows ipq806x to keep the GPIO-related and PCIe-related pin configuration in DTS without tripping over strict pinmux ownership checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")
#1 lore raw

PATCH 1/2 pinctrl: qcom: ipq806x: mark gpio as a GPIO pin function

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Add a IPQ_GPIO_PIN_FUNCTION() helper and use it for the ipq806x gpio function, matching how the msm-based qcom drivers handle this.

This allows ipq806x to keep the GPIO-related configuration in DTS without tripping over strict pinmux ownership
checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")
---
 drivers/pinctrl/qcom/pinctrl-ipq8064.c | 2 +-
 drivers/pinctrl/qcom/pinctrl-msm.h     | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)
drivers/pinctrl/qcom/pinctrl-ipq8064.c +1 -1
index 78d320d56be6d..e1c3c213559f9 100644
@@ -480,7 +480,7 @@ static const char * const ps_hold_groups[] = {
 };
 
 static const struct pinfunction ipq8064_functions[] = {
-	IPQ_PIN_FUNCTION(gpio),
+	IPQ_GPIO_PIN_FUNCTION(gpio),
 	IPQ_PIN_FUNCTION(mdio),
 	IPQ_PIN_FUNCTION(ssbi),
 	IPQ_PIN_FUNCTION(spmi),
drivers/pinctrl/qcom/pinctrl-msm.h +5 -0
index 4fbff61de6bb3..b94ba1a4177ed 100644
@@ -24,6 +24,11 @@ struct pinctrl_pin_desc;
 					fname##_groups,		\
 					ARRAY_SIZE(fname##_groups))
 
+#define IPQ_GPIO_PIN_FUNCTION(fname)					\
+	[IPQ_MUX_##fname] = PINCTRL_GPIO_PINFUNCTION(#fname,		\
+					fname##_groups,		\
+					ARRAY_SIZE(fname##_groups))
+
 #define MSM_PIN_FUNCTION(fname) 				\
 	[msm_mux_##fname] = PINCTRL_PINFUNCTION(#fname,		\
 					fname##_groups,		\
Signature · 1 line
2.55.0
Reviewed-by on v1 1/2
#2 lore raw

Re: [PATCH 1/2] pinctrl: qcom: ipq806x: mark gpio as a GPIO pin function

Quoted 7 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Add a IPQ_GPIO_PIN_FUNCTION() helper and use it for the ipq806x gpio function, matching how the msm-based qcom drivers handle this.

Quoted 7 lines

This allows ipq806x to keep the GPIO-related configuration in DTS without tripping over strict pinmux ownership
checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")

---

Konrad

Reviewed-by on v1 1/2
#3 lore raw

Re: [PATCH 1/2] pinctrl: qcom: ipq806x: mark gpio as a GPIO pin function

In reply to Hans Ulli Kroll
Quoted 11 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Add a IPQ_GPIO_PIN_FUNCTION() helper and use it for the ipq806x gpio function, matching how the msm-based qcom drivers handle this.

This allows ipq806x to keep the GPIO-related configuration in DTS without tripping over strict pinmux ownership
checks.

Quoted 7 lines
Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")
---
 drivers/pinctrl/qcom/pinctrl-ipq8064.c | 2 +-
 drivers/pinctrl/qcom/pinctrl-msm.h     | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)
Signature · 2 lines
With best wishes
Dmitry
maintainer Acked-by on v1 1/2
#4 lore raw

Re: [PATCH 1/2] pinctrl: qcom: ipq806x: mark gpio as a GPIO pin function

In reply to Hans Ulli Kroll
Quoted 7 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Add a IPQ_GPIO_PIN_FUNCTION() helper and use it for the ipq806x gpio function, matching how the msm-based qcom drivers handle this.

Quoted 6 lines

This allows ipq806x to keep the GPIO-related configuration in DTS without tripping over strict pinmux ownership
checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")

This patch -> Bartosz

Yours,
Linus Walleij

#5 lore raw

PATCH 2/2 pinctrl: qcom: ipq806x: mark pci reset as a GPIO pin function

In reply to Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Mark PCIe reset as GPIO pin function

This allows ipq806x to keep the PCIe-reset related configuration in DTS without tripping over strict pinmux ownership checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")
---
 drivers/pinctrl/qcom/pinctrl-ipq8064.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/pinctrl/qcom/pinctrl-ipq8064.c +3 -3
index e1c3c213559f9..0a50486337d31 100644
@@ -507,19 +507,19 @@ static const struct pinfunction ipq8064_functions[] = {
 	IPQ_PIN_FUNCTION(usb2_hsic),
 	IPQ_PIN_FUNCTION(rgmii2),
 	IPQ_PIN_FUNCTION(sata),
-	IPQ_PIN_FUNCTION(pcie1_rst),
+	IPQ_GPIO_PIN_FUNCTION(pcie1_rst),
 	IPQ_PIN_FUNCTION(pcie1_prsnt),
 	IPQ_PIN_FUNCTION(pcie1_pwren_n),
 	IPQ_PIN_FUNCTION(pcie1_pwren),
 	IPQ_PIN_FUNCTION(pcie1_pwrflt),
 	IPQ_PIN_FUNCTION(pcie1_clk_req),
-	IPQ_PIN_FUNCTION(pcie2_rst),
+	IPQ_GPIO_PIN_FUNCTION(pcie2_rst),
 	IPQ_PIN_FUNCTION(pcie2_prsnt),
 	IPQ_PIN_FUNCTION(pcie2_pwren_n),
 	IPQ_PIN_FUNCTION(pcie2_pwren),
 	IPQ_PIN_FUNCTION(pcie2_pwrflt),
 	IPQ_PIN_FUNCTION(pcie2_clk_req),
-	IPQ_PIN_FUNCTION(pcie3_rst),
+	IPQ_GPIO_PIN_FUNCTION(pcie3_rst),
 	IPQ_PIN_FUNCTION(pcie3_prsnt),
 	IPQ_PIN_FUNCTION(pcie3_pwren_n),
 	IPQ_PIN_FUNCTION(pcie3_pwren),
Signature · 1 line
2.55.0
#6 lore raw

Re: [PATCH 2/2] pinctrl: qcom: ipq806x: mark pci reset as a GPIO pin function

Quoted 8 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Mark PCIe reset as GPIO pin function

This allows ipq806x to keep the PCIe-reset related configuration in DTS without tripping over strict pinmux ownership checks.

Could you expand on what the issue is? We haven't seen this being necessary on other platforms

Konrad

Reviewed-by on v1 2/2
#7 lore raw

Re: [PATCH 2/2] pinctrl: qcom: ipq806x: mark pci reset as a GPIO pin function

In reply to Hans Ulli Kroll
Quoted 6 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Mark PCIe reset as GPIO pin function

Quoted 9 lines

This allows ipq806x to keep the PCIe-reset related configuration in DTS without tripping over strict pinmux ownership checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")
---
 drivers/pinctrl/qcom/pinctrl-ipq8064.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
Signature · 2 lines
With best wishes
Dmitry
maintainer Acked-by on v1 2/2
#8 lore raw

Re: [PATCH 2/2] pinctrl: qcom: ipq806x: mark pci reset as a GPIO pin function

In reply to Hans Ulli Kroll
Quoted 11 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

Mark PCIe reset as GPIO pin function

This allows ipq806x to keep the PCIe-reset related configuration in DTS without tripping over strict pinmux ownership checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")

This patch -> Bartosz

Yours,
Linus Walleij

maintainer Acked-by on the v1 series
#9 lore raw
In reply to Hans Ulli Kroll
Quoted 8 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

ipq806x still describes its gpio function with QCA_PIN_FUNCTION(gpio), so it is not treated as a GPIO pin function. As a result, GPIO consumers can still conflict with pinctrl states that select the "gpio" function.

Quoted 5 lines

This allows ipq806x to keep the GPIO-related and PCIe-related pin configuration in DTS without tripping over strict pinmux ownership checks.

Fixes cc85cb96e2e4 ("pinctrl: qcom: make the pinmuxing strict")

This need to be relayed to Bartosz as qualcomm pinctrl maintainer!

FWIW:

Yours,
Linus Walleij

#10 lore raw
In reply to Hans Ulli Kroll
Quoted 9 lines · Hans Ulli Kroll

The qcom pinctrl core supports marking functions that represent GPIO mode via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject GPIO requests for pins that are muxed to the GPIO function.

ipq806x still describes its gpio function with QCA_PIN_FUNCTION(gpio), so it is not treated as a GPIO pin function. As a result, GPIO consumers can still conflict with pinctrl states that select the "gpio" function.

[...]

Applied, thanks!

[1/2] pinctrl: qcom: ipq806x: mark gpio as a GPIO pin function

      https://git.kernel.org/brgl/c/687f39faccba29ab26de965411db37e849af8ec2
[2/2] pinctrl: qcom: ipq806x: mark pci reset as a GPIO pin function
      https://git.kernel.org/brgl/c/fd46760956509f580f7d3d25db4de10e7c6f949b

Best regards,

Signature · 1 line
Bartosz Golaszewski <[email protected]>