add tlbi=off to disable INVLPGB
Subsystems (3)
PATCH 1/1 add tlbi=off to disable INVLPGB
With the recently found INVLPGB / TLBSYNC issue, there has been some interest in disabling invlpgb TLB flushing, in order to rule out that CPU issue as a cause of userspace crashes.
The top search result shows "clearcpuid=invlpgb"
However, invlpgb is not actually in x86_cap_flags, so booting with clearcpuid=invlpgb results in an error message:
clearcpuid: unknown CPU flag: invlpgb
Add a kernel commandline option to turn off AMD TLBI, to make it easier to rule out INVLPGB as a cause of userspace crashes.
Verified by booting a Bergamo system with tlbi=off and checking that the INVLPGB bit is clear in boot_cpu_data.x86_capability
--- arch/x86/mm/init_64.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
arch/x86/mm/init_64.c +13 -0
@@ -130,6 +130,19 @@ static int __init nonx32_setup(char *str) }__setup ("noexec32=" , nonx32_setup); +/* +* tlbi=off +* +* Control AMD TLBI feature (INVLPGB TLB flushing) +*/ +static int __init tlbi_setup (char *str) +{ +if (!strcmp (str,"off" )) +setup_clear_cpu_cap (X86_FEATURE_INVLPGB ); +return 1 ; +} +__setup ("tlbi=" , tlbi_setup); +static void sync_global_pgds_l5 (unsigned long start,unsigned long end) {unsigned long addr;
Signature · 1 line
2.53.0-Meta
Borislav Petkov
maintainerQuoted 14 lines · Rik van Riel
With the recently found INVLPGB / TLBSYNC issue, there has been some interest in disabling invlpgb TLB flushing, in order to rule out that CPU issue as a cause of userspace crashes.
The top search result shows "clearcpuid=invlpgb"
However, invlpgb is not actually in
x86_cap_flags, so booting with clearcpuid=invlpgb results in an error message:clearcpuid: unknown CPU flag: invlpgb
Add a kernel commandline option to turn off AMD TLBI, to make it easier to rule out INVLPGB as a cause of userspace crashes.
Quoted 8 lines
Verified by booting a Bergamo system with tlbi=off and checking that the INVLPGB bit is clear in boot_cpu_data.x86_capability
Signed-off-by Rik van Riel <[email protected]>Suggested-by Borislav Petkov <[email protected]>--- arch/x86/mm/init_64.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
I'll take that and raise you with v2:
The rationale for moving it to amd.c is that it won't be there on builds which don't enable AMD code. And we could still raise it up somewhere vendor-agnostic later if the other vendor wants to be able to disable their version if TLB invalidation glue implementation.
From: Rik van Riel <[email protected]>
Date: Wed, 29 Jul 2026 20:43:41 -0400
Subject: [PATCH] x86/CPU/AMD: Add a tlbi= cmdline switch
With the recently found INVLPGB / TLBSYNC issue, there has been some interest in disabling INVLPGB-based TLB flushing, in order to rule out that CPU issue as a cause of userspace crashes.
Add a kernel command line option to control AMD TLBI.
[ bp: Rewrite commit message, move to amd.c, add documentation. ]
--- Documentation/admin-guide/kernel-parameters.txt | 5 +++++ arch/x86/kernel/cpu/amd.c | 10 ++++++++++ 2 files changed, 15 insertions(+)
Documentation/admin-guide/kernel-parameters.txt +5 -0
@@ -7568,6 +7568,11 @@ Kernel parameters See Documentation/admin-guide/mm/transhuge.rst for more details. + tlbi= [X86-64] + Format: {off} + Control the AMD TLBI feature support (INVLPGB-based + TLB flushing). + topology= [S390,EARLY] Format: {off | on} Specify if the kernel should make use of the cpu
arch/x86/kernel/cpu/amd.c +10 -0
@@ -1440,3 +1440,13 @@ static __init int print_dmi_agesa(void)return 0 ; }late_initcall (print_dmi_agesa); + +/* Control TLBI feature (INVLPGB-based TLB flushing) */ +static int __init tlbi_setup (char *str) +{ +if (!strcmp (str,"off" )) +setup_clear_cpu_cap (X86_FEATURE_INVLPGB ); + +return 1 ; +} +__setup ("tlbi=" , tlbi_setup);
Signature · 7 lines
2.53.0
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquettePeter Zijlstra
maintainerQuoted 76 lines · Borislav Petkov
Quoted 14 lines · Rik van Riel
With the recently found INVLPGB / TLBSYNC issue, there has been some interest in disabling invlpgb TLB flushing, in order to rule out that CPU issue as a cause of userspace crashes.
The top search result shows "clearcpuid=invlpgb"
However, invlpgb is not actually in
x86_cap_flags, so booting with clearcpuid=invlpgb results in an error message:clearcpuid: unknown CPU flag: invlpgb
Add a kernel commandline option to turn off AMD TLBI, to make it easier to rule out INVLPGB as a cause of userspace crashes.
Quoted 8 lines
Verified by booting a Bergamo system with tlbi=off and checking that the INVLPGB bit is clear in boot_cpu_data.x86_capability
Signed-off-by Rik van Riel <[email protected]>Suggested-by Borislav Petkov <[email protected]>--- arch/x86/mm/init_64.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)I'll take that and raise you with v2:
The rationale for moving it to
amd.cis that it won't be there on builds which don't enable AMD code. And we could still raise it up somewhere vendor-agnostic later if the other vendor wants to be able to disable their version if TLB invalidation glue implementation.From: Rik van Riel <[email protected]>
Date: Wed, 29 Jul 2026 20:43:41 -0400
Subject: [PATCH] x86/CPU/AMD: Add a tlbi= cmdline switchWith the recently found INVLPGB / TLBSYNC issue, there has been some interest in disabling INVLPGB-based TLB flushing, in order to rule out that CPU issue as a cause of userspace crashes.
Add a kernel command line option to control AMD TLBI.
[ bp: Rewrite commit message, move to
amd.c, add documentation. ]Suggested-by Borislav Petkov <[email protected]>Signed-off-by Rik van Riel <[email protected]>Signed-off-by Borislav Petkov (AMD) <[email protected]>--- Documentation/admin-guide/kernel-parameters.txt | 5 +++++ arch/x86/kernel/cpu/amd.c | 10 ++++++++++ 2 files changed, 15 insertions(+)Documentation/admin-guide/kernel-parameters.txt +5
-0@@ -7568,6 +7568,11 @@ Kernel parameters See Documentation/admin-guide/mm/transhuge.rst for more details. + tlbi= [X86-64] + Format: {off} + Control the AMD TLBI feature support (INVLPGB-based + TLB flushing). + topology= [S390,EARLY] Format: {off | on} Specify if the kernel should make use of the cpuarch/x86/kernel/cpu/amd.c +0
-0@@ -1440,3 +1440,13 @@ static __init int print_dmi_agesa(void)return 0 ; }late_initcall (print_dmi_agesa);
arch/x86/kernel/cpu/amd.c static __init int print_dmi_agesa(void) · line 1452
Quoted 10 lines
arch/x86/kernel/cpu/amd.c +10
-0+ +/* Control TLBI feature (INVLPGB-based TLB flushing) */ +static int __init tlbi_setup (char *str) +{ +if (!strcmp (str,"off" )) +setup_clear_cpu_cap (X86_FEATURE_INVLPGB ); + +return 1 ; +} +__setup ("tlbi=" , tlbi_setup);
TLBI stands for Translation Lookaside Buffer Invalidation. So a command line that says: 'tlbi=off' means no move invalidation *at*all*. This seems like a very bad option.
Please rename.
Borislav Petkov
maintainerQuoted 1 line · Peter Zijlstra
TLBI stands for Translation Lookaside Buffer Invalidation.
... instructions." Both ARM and AMD call it this. The usual abbreviation overload we're suffering from.
Quoted 4 lines
So a command line that says: 'tlbi=off' means no move invalidation *at*all*. This seems like a very bad option.
Please rename.
You suggest one. :-P
But it needs to be short and relatively easy to type. And "invlpgb" ain't easy and I can't tell you how many times I've seen it getting typoed.
Thx.
Signature · 4 lines
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquettePeter Zijlstra
maintainerQuoted 5 lines · Borislav Petkov
Quoted 1 line · Peter Zijlstra
TLBI stands for Translation Lookaside Buffer Invalidation.
... instructions." Both ARM and AMD call it this. The usual abbreviation overload we're suffering from.
Same difference, that would mean disabling all TLB instructions :-) Very much including the local invalidation used for IPI based TLB invalidation.
But also, nah:
https://support.arm.com/documentation/dui0802/b/A64-General-Instructions/TLBI
"TLBI - TLB invalidate operation."
Quoted 9 lines
Quoted 4 lines
So a command line that says: 'tlbi=off' means no move invalidation *at*all*. This seems like a very bad option.
Please rename.
You suggest one. :-P
But it needs to be short and relatively easy to type. And "invlpgb" ain't easy and I can't tell you how many times I've seen it getting typoed.
tlbi={ipi,broadcast}
Anyway, INVLPGB stands for INVaLidate PaGe Broadcast, ain'ted that hard :-) Also, you know who to complain to for that instruction :-)
Borislav Petkov
maintainerQuoted 5 lines · Peter Zijlstra
But also, nah:
https://support.arm.com/documentation/dui0802/b/A64-General-Instructions/TLBI
"TLBI - TLB invalidate operation."
Yap, that's what I meant.
Quoted 4 lines
tlbi={ipi,broadcast}
Anyway, INVLPGB stands for INVaLidate PaGe Broadcast, ain'ted that hard :-) Also, you know who to complain to for that instruction :-)
Too late for that. :)
"tlbi=broadcast" is a bit much to type: imagine you're hunched over some box in the server room, like Spiderman, crouching between racks and balancing the keyboard on some old pile of cables... :-P
So how about shorter:
"tlbi=bcast"
"tlbi=ipi"
?
We probably won't need to write "bcast" at all, actually, because that would be the default. So "tlbi=ipi" only. Yeah, that's good.
Thx.
Signature · 4 lines
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquettePeter Zijlstra
maintainerQuoted 11 lines · Borislav Petkov
Quoted 5 lines · Peter Zijlstra
But also, nah:
https://support.arm.com/documentation/dui0802/b/A64-General-Instructions/TLBI
"TLBI - TLB invalidate operation."
Yap, that's what I meant.
Quoted 2 lines
tlbi={ipi,broadcast}
Quoted 8 lines
Quoted 2 lines
Anyway, INVLPGB stands for INVaLidate PaGe Broadcast, ain'ted that hard :-) Also, you know who to complain to for that instruction :-)
Too late for that. :)
"tlbi=broadcast" is a bit much to type: imagine you're hunched over some box in the server room, like Spiderman, crouching between racks and balancing the keyboard on some old pile of cables... :-P
There is IPMI and other fancy remote management stuff these days. There is no reason to suffer hearing loss for entering server rooms anymore :-)
Quoted 9 lines
So how about shorter:
"tlbi=bcast"
"tlbi=ipi"?
We probably won't need to write "bcast" at all, actually, because that would be the default. So "tlbi=ipi" only. Yeah, that's good.
Didn't we have a case where INVLPGB was disabled due to firmware or something? I was thinking tlbi=broadcast could be used to force enable it or something.
Anyway, if that case don't exist, then yeah.
Quoted 17 lines · On Fri, 31 Jul 2026 10:46:56 +0200 Peter Zijlstra <[email protected]> wrote:
Quoted 16 lines · Borislav Petkov
Quoted 5 lines · Peter Zijlstra
But also, nah:
https://support.arm.com/documentation/dui0802/b/A64-General-Instructions/TLBI
"TLBI - TLB invalidate operation."
Yap, that's what I meant.
Quoted 4 lines
tlbi={ipi,broadcast}
Anyway, INVLPGB stands for INVaLidate PaGe Broadcast, ain'ted that hard :-) Also, you know who to complain to for that instruction :-)
Too late for that. :)
Quoted 7 lines
Quoted 3 lines
"tlbi=broadcast" is a bit much to type: imagine you're hunched over some box in the server room, like Spiderman, crouching between racks and balancing the keyboard on some old pile of cables... :-P
There is IPMI and other fancy remote management stuff these days. There is no reason to suffer hearing loss for entering server rooms anymore :-)
The real problem is typing while wearing ski gloves...
David
Quoted 17 lines
Quoted 10 lines
So how about shorter:
"tlbi=bcast"
"tlbi=ipi"?
We probably won't need to write "bcast" at all, actually, because that would be the default. So "tlbi=ipi" only. Yeah, that's good.
Didn't we have a case where INVLPGB was disabled due to firmware or something? I was thinking tlbi=broadcast could be used to force enable it or something.
Anyway, if that case don't exist, then yeah.
Quoted 11 lines · Peter Zijlstra
Quoted 4 lines · Borislav Petkov
We probably won't need to write "bcast" at all, actually, because that would
be the default. So "tlbi=ipi" only. Yeah, that's good.Didn't we have a case where INVLPGB was disabled due to firmware or something? I was thinking tlbi=broadcast could be used to force enable
it or something.
I have a mini PC here that does just that.
lspcu says:
AMD Ryzen 9 7940HS w/ Radeon 780M Graphics
That suggests the core should have INVLPGB built-in, but it shows up as disabled in cpuid.
$ cpuid -1 | grep INVLPGB
INVLPGB instruction = false
INVLPGB supports TLB flush guest nested = false
max page count for INVLPGB instruction = 0x0 (0)
INVLPGB/TLBSYNC hyperv interc enable = falseI have not been able to find a BIOS option that
results in it being enabled.
Signature · 1 line
All Rights Reversed.
Borislav Petkov
maintainerQuoted 3 lines · Peter Zijlstra
There is IPMI and other fancy remote management stuff these days. There is no reason to suffer hearing loss for entering server rooms anymore :-)
Oh but but, there are folks who really really use hearing protection gear and enter such rooms. I visited one recently.
Quoted 3 lines
Didn't we have a case where INVLPGB was disabled due to firmware or something? I was thinking tlbi=broadcast could be used to force enable it or something.
I don't think you can force-enable it, no matter how much you wanted. :-)
Quoted 1 line
Anyway, if that case don't exist, then yeah.
Yeah, let's start minimal.
Thx.
Signature · 4 lines
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquetteBorislav Petkov
maintainerPATCH 1/1 x86/CPU: Add a tlbi= cmdline switch
Ok,
here's what I have. I've tagged it for stable so that it goes everywhere and we have the capability of disabling TLBI. I'm thinking of queueing it next week.
Thx.
---
From: Rik van Riel <[email protected]>
Date: Wed, 29 Jul 2026 20:43:41 -0400
With the recently found INVLPGB / TLBSYNC issue, there has been some interest in disabling INVLPGB-based TLB flushing, in order to rule out that CPU issue as a cause of userspace crashes.
Add a kernel command line option to control the TLB flushing behavior.
If the need arises, we will add a "tlbi=broadcast" for the case when TLB invalidation broadcasts need to be explicitly selected, but this is not needed now yet.
[ bp: Rewrite commit message, move to cpu/common.c, add documentation. ]
--- Documentation/admin-guide/kernel-parameters.txt | 4 ++++ arch/x86/kernel/cpu/common.c | 10 ++++++++++ 2 files changed, 14 insertions(+)
Documentation/admin-guide/kernel-parameters.txt +4 -0
@@ -7568,6 +7568,10 @@ Kernel parameters See Documentation/admin-guide/mm/transhuge.rst for more details. + tlbi= [X86-64] + Format: {ipi} + ipi: switch to IPI-based TLB flushing + topology= [S390,EARLY] Format: {off | on} Specify if the kernel should make use of the cpu
arch/x86/kernel/cpu/common.c +10 -0
@@ -2675,3 +2675,13 @@ void __init arch_cpu_finalize_init(void)*/ mem_encrypt_init (); } + +/* Control TLB flushing methods */ +static int __init tlbi_setup (char *str) +{ +if (!strcmp (str,"ipi" )) +setup_clear_cpu_cap (X86_FEATURE_INVLPGB ); + +return 1 ; +} +__setup ("tlbi=" , tlbi_setup);
Signature · 8 lines
2.53.0
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette[tip: x86/urgent] x86/CPU: Add a tlbi= cmdline switch
In reply to Rik van RielThe following commit has been merged into the x86/urgent branch of tip:
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: abe7c8b09bd72a9c726016257c6281f129b4c02d Gitweb: https://git.kernel.org/tip/abe7c8b09bd72a9c726016257c6281f129b4c02d Author: Rik van Riel <[email protected]> AuthorDate: Thu, 06 Aug 2026 08:54:57 -07:00 Committer: Borislav Petkov (AMD) <[email protected]> CommitterDate: Mon, 10 Aug 2026 07:09:18 -07:00
x86/CPU: Add a tlbi= cmdline switch
With the recently found INVLPGB / TLBSYNC issue, there has been some interest in disabling INVLPGB-based TLB flushing, in order to rule out that CPU issue as a cause of userspace crashes.
Add a kernel command line option to control the TLB flushing behavior.
If the need arises, we will add a "tlbi=broadcast" for the case when TLB invalidation broadcasts need to be explicitly selected, but this is not needed now yet.
[ bp: Rewrite commit message, move to cpu/common.c, add documentation. ]
--- Documentation/admin-guide/kernel-parameters.txt | 4 ++++ arch/x86/kernel/cpu/common.c | 10 ++++++++++ 2 files changed, 14 insertions(+)
Documentation/admin-guide/kernel-parameters.txt +4 -0
@@ -7568,6 +7568,10 @@ Kernel parameters See Documentation/admin-guide/mm/transhuge.rst for more details. + tlbi= [X86-64] + Format: {ipi} + ipi: switch to IPI-based TLB flushing + topology= [S390,EARLY] Format: {off | on} Specify if the kernel should make use of the cpu
arch/x86/kernel/cpu/common.c +10 -0
@@ -2664,3 +2664,13 @@ void __init arch_cpu_finalize_init(void)*/ mem_encrypt_init (); } + +/* Control TLB flushing methods */ +static int __init tlbi_setup (char *str) +{ +if (!strcmp (str,"ipi" )) +setup_clear_cpu_cap (X86_FEATURE_INVLPGB ); + +return 1 ; +} +__setup ("tlbi=" , tlbi_setup);