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spi: dt-bindings: microchip,pic32mzda-spi: Convert to DT schema

PATCH Superseded Udaya Kiran Challa 4 participants 6 messages Aug 14 – Aug 22

Subsystems (2)

v4 of 5 Superseded Latest is v5 →

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#0 lore raw

PATCH v4 1/1 spi: dt-bindings: microchip,pic32mzda-spi: Convert to DT schema

Convert Microchip PIC32 SPI controller devicetree binding from legacy text format to DT schema.

---
Changelog:
Changes since v3:
- Change maintainer to SPI subsystem maintainer

Link to v3: https://lore.kernel.org/all/[email protected]/

Changes since v2:
- Add cs-gpios to required property

Link to v2: https://lore.kernel.org/all/[email protected]/

Changes since v1:
- Rename schema file to microchip,pic32mzda-spi.yaml
- Update subject prefix to match SPI DT binding conventions

Link to v1:https://lore.kernel.org/all/[email protected]/

---
 .../bindings/spi/microchip,pic32mzda-spi.yaml | 82 +++++++++++++++++++
 .../bindings/spi/microchip,spi-pic32.txt      | 34 --------
 2 files changed, 82 insertions(+), 34 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml
 delete mode 100644 Documentation/devicetree/bindings/spi/microchip,spi-pic32.txt
Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +82 -0
new file mode 100644
index 000000000000..2ef3480fa63e
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/microchip,pic32mzda-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PIC32MZDA SPI Controller
+
+maintainers:
+  - Mark Brown <[email protected]>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    const: microchip,pic32mzda-spi
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: Fault interrupt
+      - description: Receive interrupt
+      - description: Transmit interrupt
+
+  interrupt-names:
+    items:
+      - const: fault
+      - const: rx
+      - const: tx
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: mck0
+
+  cs-gpios:
+    maxItems: 1
+
+  dmas:
+    items:
+      - description: RX DMA channel
+      - description: TX DMA channel
+
+  dma-names:
+    items:
+      - const: spi-rx
+      - const: spi-tx
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-names
+  - clocks
+  - clock-names
+  - cs-gpios
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/gpio/gpio.h>
+
+    spi@1f821000 {
+        compatible = "microchip,pic32mzda-spi";
+        reg = <0x1f821000 0x200>;
+        interrupts = <109 IRQ_TYPE_LEVEL_HIGH>,
+                     <110 IRQ_TYPE_LEVEL_HIGH>,
+                     <111 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "fault", "rx", "tx";
+        clocks = <&PBCLK2>;
+        clock-names = "mck0";
+        cs-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
+        dmas = <&dma 134>, <&dma 135>;
+        dma-names = "spi-rx", "spi-tx";
+    };
Documentation/devicetree/bindings/spi/microchip,spi-pic32.txt deleted +0 -34
deleted file mode 100644
index 79de379f4dc0..000000000000
@@ -1,34 +0,0 @@
-Microchip PIC32 SPI Master controller
-
-Required properties:
-- compatible: Should be "microchip,pic32mzda-spi".
-- reg: Address and length of register space for the device.
-- interrupts: Should contain all three spi interrupts in sequence
-              of <fault-irq>, <receive-irq>, <transmit-irq>.
-- interrupt-names: Should be "fault", "rx", "tx" in order.
-- clocks: Phandle of the clock generating SPI clock on the bus.
-- clock-names: Should be "mck0".
-- cs-gpios: Specifies the gpio pins to be used for chipselects.
-            See: Documentation/devicetree/bindings/spi/spi-bus.txt
-
-Optional properties:
-- dmas: Two or more DMA channel specifiers following the convention outlined
-        in Documentation/devicetree/bindings/dma/dma.txt
-- dma-names: Names for the dma channels. There must be at least one channel
-             named "spi-tx" for transmit and named "spi-rx" for receive.
-
-Example:
-
-spi1: spi@1f821000 {
-        compatible = "microchip,pic32mzda-spi";
-        reg = <0x1f821000 0x200>;
-        interrupts = <109 IRQ_TYPE_LEVEL_HIGH>,
-                     <110 IRQ_TYPE_LEVEL_HIGH>,
-                     <111 IRQ_TYPE_LEVEL_HIGH>;
-        interrupt-names = "fault", "rx", "tx";
-        clocks = <&PBCLK2>;
-        clock-names = "mck0";
-        cs-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
-        dmas = <&dma 134>, <&dma 135>;
-        dma-names = "spi-rx", "spi-tx";
-};
Signature · 1 line
2.34.1
#1 lore raw
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] The schema incorrectly restricts `cs-gpios` to `maxItems: 1` and makes it strictly required…

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The schema incorrectly restricts cs-gpios to maxItems: 1 and makes it strictly required, breaking multi-device and grounded-CS SPI bus configurations. --

--- Patch [1]: [PATCH v4] spi: dt-bindings: microchip,pic32mzda-spi: Convert to DT schema --- commit fca958be633f7ae75e390f0bb61a2c6c29a85193
Author: Udaya Kiran Challa <[email protected]>

spi: dt-bindings: microchip,pic32mzda-spi: Convert to DT schema

Convert Microchip PIC32 SPI controller devicetree binding from legacy text format to DT schema.

Link to v3: https://lore.kernel.org/all/[email protected]/
Link to v2: https://lore.kernel.org/all/[email protected]/
Link to v1: https://lore.kernel.org/all/[email protected]/

Quoted 5 lines
Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +0 -0
new file mode 100644
index 0000000000000..2ef3480fa63e4

[ ... ]

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml line 42

Quoted 9 lines
Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +9 -0
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: mck0
+
+  cs-gpios:
+    maxItems: 1

[Severity: Medium]
Does this limit the controller to a single device? The legacy text binding explicitly allowed multiple pins to be used for chip selects.

The SPI core in drivers/spi/spi.c supports multiple devices by dynamically expanding the number of chip selects if multiple GPIOs are provided. Setting this to a maximum of one breaks valid multiplexed SPI bus configurations.

Quoted 5 lines
Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +5 -0
+
+  dmas:
+    items:
+      - description: RX DMA channel
+      - description: TX DMA channel

[ ... ]

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml line 61

Quoted 8 lines
Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +8 -0
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-names
+  - clocks
+  - clock-names
+  - cs-gpios

[Severity: Medium]
Should cs-gpios be strictly required?

Making it mandatory breaks device tree backward compatibility for valid hardware configurations where a single SPI device's chip select is permanently tied to its active state (e.g., tied to ground). In such tied-low configurations, no software chip select toggling is needed, so the property is legitimately omitted from the hardware description.

Quoted 4 lines
Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +4 -0
+
+unevaluatedProperties: false
+
+examples:
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
maintainer
#2 lore raw
In reply to Udaya Kiran Challa

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml line 10

Quoted 5 lines · Udaya Kiran Challa

Convert Microchip PIC32 SPI controller devicetree binding from legacy text format to DT schema.

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +2 -0
+maintainers:
+  - Mark Brown <[email protected]>

Try again! :P I think the DT people had some default they used for cases like this, but ICBW?

maintainer
#3 lore raw
Quoted 9 lines · Mark Brown

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml line 10

Quoted 5 lines · Udaya Kiran Challa

Convert Microchip PIC32 SPI controller devicetree binding from legacy text format to DT schema.

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +2 -0
+maintainers:
+  - Mark Brown <[email protected]>

Try again! :P I think the DT people had some default they used for cases like this, but ICBW?

I'm the default, but really I wonder if pic32 could just be dropped. No commits from a Microchip person since 2016 on arch/mips/pic32 or arch/mips/boot/dts/pic32. Almost all generic cleanups otherwise. These chips appear to max out at 32MB (SiP) or 128MB DDR2.

Perhaps I should send some AI patches against it...

There's this[1], but no updates in 5 years.

Arnd, Thomas, any thoughts on this platform?

Rob

[1] https://github.com/jjr-simiatec/Linux-LTS-for-PIC32

maintainer
#4 lore raw
Quoted 16 lines · Rob Herring
Quoted 9 lines · Mark Brown

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml line 10

Quoted 5 lines · Udaya Kiran Challa

Convert Microchip PIC32 SPI controller devicetree binding from legacy text format to DT schema.

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +2 -0
+maintainers:
+  - Mark Brown <[email protected]>

Try again! :P I think the DT people had some default they used for cases like this, but ICBW?

I'm the default, but really I wonder if pic32 could just be dropped. No commits from a Microchip person since 2016 on arch/mips/pic32 or arch/mips/boot/dts/pic32. Almost all generic cleanups otherwise. These chips appear to max out at 32MB (SiP) or 128MB DDR2.

Quoted 5 lines

Perhaps I should send some AI patches against it...

There's this[1], but no updates in 5 years.

Arnd, Thomas, any thoughts on this platform?

Thomas agreed to be maintainer on IRC.

Rob

author
#5 lore raw
Quoted 18 lines · Rob Herring
Quoted 16 lines · Rob Herring
Quoted 9 lines · Mark Brown

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml line 10

Quoted 5 lines · Udaya Kiran Challa

Convert Microchip PIC32 SPI controller devicetree binding from legacy text format to DT schema.

Documentation/devicetree/bindings/spi/microchip,pic32mzda-spi.yaml new file +2 -0
+maintainers:
+  - Mark Brown <[email protected]>

Try again! :P I think the DT people had some default they used for cases like this, but ICBW?

I'm the default, but really I wonder if pic32 could just be dropped. No commits from a Microchip person since 2016 on arch/mips/pic32 or arch/mips/boot/dts/pic32. Almost all generic cleanups otherwise. These chips appear to max out at 32MB (SiP) or 128MB DDR2.

Quoted 7 lines
Quoted 5 lines

Perhaps I should send some AI patches against it...

There's this[1], but no updates in 5 years.

Arnd, Thomas, any thoughts on this platform?

Thomas agreed to be maintainer on IRC.

Thanks, Rob. Understood. I’ll update the maintainer to Thomas Bogendoerfer for microchip,pic32mzda-spi & microchip,pic32mzda-sqi dt-bindings and send the next revision.

Regards,
Udaya Kiran Challa