Recent changes (master)
The following changes since commit 1de4a3dc5d10a0107b51c496dc96a07f58bdc5c9:
Merge branch 'add_copyright' of https://github.com/ljw8161/fio (2026-08-07 11:09:43 -0400)
are available in the Git repository at:
git://git.kernel.dk/fio.git master
for you to fetch changes up to b27fdbac98125f24c7e78ae439245c6989a4a718:
fio: move example job file to examples directory (2026-08-18 12:24:18 -0400)
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Vincent Fu (2):
Merge branch 'feat/hipfile-upstream-rebase' of https://github.com/sbates130272/fio
fio: move example job file to examples directory
zbyrne (4):
engines: refactor libcufile.c into a shared gpuaccel layer engines/gpuaccel: add per-backend sync flags and backend-scoped state engines/libhipfile: add ROCm hipFile engine
examples/doc: add libhipfile example job files and documentation
HOWTO.rst | 33 ++ Makefile | 8 + configure | 38 ++ engines/gpuaccel.c | 536 +++++++++++++++++++ engines/gpuaccel.h | 82 +++ engines/libcufile.c | 595 +++++---------------- engines/libhipfile.c | 272 ++++++++++ .../example_latency_steadystate.fio | 0 examples/libhipfile-hipfile.fio | 44 ++ examples/libhipfile-posix.fio | 41 ++ fio.1 | 37 ++ optgroup.c | 4 + optgroup.h | 2 + 13 files changed, 1229 insertions(+), 463 deletions(-) create mode 100644 engines/gpuaccel.c create mode 100644 engines/gpuaccel.h create mode 100644 engines/libhipfile.c rename example_latency_steadystate.fio => examples/example_latency_steadystate.fio (100%) create mode 100644 examples/libhipfile-hipfile.fio create mode 100644 examples/libhipfile-posix.fio
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Diff of recent changes:
HOWTO.rst +33 -0
@@ -2366,6 +2366,17 @@ I/O engine :option:`iomem` must not be `cudamalloc`. This ioengine defines engine specific options. + **libhipfile** + I/O engine supporting synchronous access to a GPUDirect Storage-supported + filesystem from AMD GPUs via the ROCm hipFile API. This engine performs + I/O without transferring buffers between user-space and the kernel, + unless :option:`verify` is set or :option:`rocm_io` is `posix`. + :option:`iomem` must not be `cudamalloc`. This ioengine defines + engine specific options. See `ROCm hipFile API`_ for information on + ROCm hipFile and how to install the ROCm stack. + + .. _ROCm hipFile API: https://rocm.docs.amd.com/projects/hip/en/latest/reference/hip_runtime_api/modules/file_apis.html + **dfs** I/O engine supporting asynchronous read and write operations to the DAOS File System (DFS) via libdfs.
@@ -3264,6 +3275,28 @@ with the caveat that when used on the command line, they must come after the GPU to RAM before a write and copied from RAM to GPU after a read. :option:`verify` does not affect use of cudaMemcpy. +.. option:: gpu_dev_ids=str : [libhipfile] + + Specify the GPU IDs to use with ROCm. This is a colon-separated list of + int. GPUs are assigned to workers roundrobin. Default is 0. + +.. option:: rocm_io=str : [libhipfile] + + Specify the type of I/O to use with ROCm. Default is **hipfile**. + + **hipfile** + Use the ROCm hipFile API. This option performs I/O directly + between a GPUDirect Storage filesystem and GPU buffers, + avoiding use of a bounce buffer. If :option:`verify` is set, + hipMemcpy is used to copy verification data between RAM and GPU. + Verification data is copied from RAM to GPU before a write + and from GPU to RAM after a read. :option:`direct` must be 1. + **posix** + Use POSIX to perform I/O with a RAM buffer, and use hipMemcpy + to transfer data between RAM and the GPUs. Data is copied from + GPU to RAM before a write and copied from RAM to GPU after a + read. :option:`verify` does not affect use of hipMemcpy. + .. option:: nfs_url=str : [nfs] URL in libnfs format, eg nfs://<server|ipv4|ipv6>/path[?arg=val[&arg=val]*]
Makefile +8 -0
@@ -120,6 +120,14 @@ ifdef CONFIG_LINUX_EXT4_MOVE_EXTENT endif ifdef CONFIG_LIBCUFILE SOURCE += engines/libcufile.c + SHARED_GPUACCEL_SOURCE = 1 +endif +ifdef CONFIG_LIBHIPFILE + SOURCE += engines/libhipfile.c + SHARED_GPUACCEL_SOURCE = 1 +endif +ifdef SHARED_GPUACCEL_SOURCE + SOURCE += engines/gpuaccel.c endif ifdef CONFIG_LINUX_SPLICE SOURCE += engines/splice.c
configure +38 -0
@@ -182,6 +182,7 @@ pmem="no" cuda="no" cuda13="no" libcufile="no" +libhipfile="no" disable_lex="" disable_pmem="no" disable_native="no"
@@ -255,6 +256,8 @@ for opt do ;; --enable-libcufile) libcufile="yes" ;; + --enable-libhipfile) libhipfile="yes" + ;; --disable-native) disable_native="yes" ;; --with-ime=*) ime_path="$optarg"
@@ -326,6 +329,7 @@ if test "$show_help" = "yes" ; then echo "--disable-optimizations Don't enable compiler optimizations" echo "--enable-cuda Enable GPUDirect RDMA support" echo "--enable-libcufile Enable GPUDirect Storage cuFile support" + echo "--enable-libhipfile Enable ROCm hipFile support" echo "--disable-native Don't build for native host" echo "--with-ime= Install path for DDN's Infinite Memory Engine" echo "--enable-libiscsi Enable iscsi support"
@@ -2872,6 +2876,37 @@ EOF fi print_config "libcufile" "$libcufile" + +########################################## +# libhipfile probe +if test "$libhipfile" != "no" ; then +cat > $TMPC << EOF +#include <hipfile.h> +#include <hip/hip_runtime.h> + +int main(int argc, char* argv[]) { + void *buf = NULL; + hipMalloc(&buf, 0); + hipFileBufRegister(NULL, 0, 0); + return 0; +} +EOF + ROCM_PATH="${ROCM_PATH:-/opt/rocm}" + HIPFILE_CFLAGS="-D__HIP_PLATFORM_AMD__ -I${ROCM_PATH}/include" + HIPFILE_LIBS="-L${ROCM_PATH}/lib -Wl,-rpath,${ROCM_PATH}/lib -lamdhip64 -lhipfile" + if compile_prog "$HIPFILE_CFLAGS" "$HIPFILE_LIBS" "libhipfile"; then + libhipfile="yes" + CFLAGS="$HIPFILE_CFLAGS $CFLAGS" + LIBS="$HIPFILE_LIBS $LIBS" + else + if test "$libhipfile" = "yes" ; then + feature_not_found "libhipfile" "" + fi + libhipfile="no" + fi +fi +print_config "libhipfile" "$libhipfile" + ########################################## # cuda 13 probe if test "$cuda" != "no" || test "$libcufile" != "no"; then
@@ -3390,6 +3425,9 @@ fi if test "$libcufile" = "yes" ; then output_sym "CONFIG_LIBCUFILE" fi +if test "$libhipfile" = "yes" ; then + output_sym "CONFIG_LIBHIPFILE" +fi if test "$cuda13" = "yes" ; then output_sym "CONFIG_CUDA13" fi
engines/gpuaccel.c new file +536 -0
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engines/gpuaccel.h new file +82 -0
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engines/libcufile.c +132 -463
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engines/libhipfile.c new file +272 -0
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examples/example_latency_steadystate.fio renamed from example_latency_steadystate.fio +0 -0
examples/libhipfile-hipfile.fio new file +44 -0
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examples/libhipfile-posix.fio new file +41 -0
41 lines not on this page · raw message
fio.1 +37 -0
@@ -2163,6 +2163,15 @@ I/O without transferring buffers between user-space and the kernel, unless \fBverify\fR is set or \fBcuda_io\fR is \fBposix\fR. \fBiomem\fR must not be \fBcudamalloc\fR. This ioengine defines engine specific options. .TP +.B libhipfile +I/O engine supporting synchronous access to a GPUDirect Storage-supported +filesystem from AMD GPUs via the ROCm hipFile API. This engine performs +I/O without transferring buffers between user-space and the kernel, +unless \fBverify\fR is set or \fBrocm_io\fR is \fBposix\fR. \fBiomem\fR must +not be \fBcudamalloc\fR. This ioengine defines engine specific options. +(See \fIhttps://rocm.docs.amd.com\fR for information on ROCm hipFile +and how to install the ROCm stack.) +.TP .B dfs I/O engine supporting asynchronous read and write operations to the DAOS File System (DFS) via libdfs.
@@ -2993,6 +3002,34 @@ the use of cudaMemcpy. .RE .RE .TP +.BI (libhipfile)gpu_dev_ids\fR=\fPstr +Specify the GPU IDs to use with ROCm. This is a colon-separated list of int. +GPUs are assigned to workers roundrobin. Default is 0. +.TP +.BI (libhipfile)rocm_io\fR=\fPstr +Specify the type of I/O to use with ROCm. This option +takes the following values: +.RS +.RS +.TP +.B hipfile (default) +Use the ROCm hipFile API. This option performs I/O directly +between a GPUDirect Storage filesystem and GPU buffers, +avoiding use of a bounce buffer. If \fBverify\fR is set, +hipMemcpy is used to copy verification data between RAM and GPU(s). +Verification data is copied from RAM to GPU before a write +and from GPU to RAM after a read. +\fBdirect\fR must be 1. +.TP +.BI posix +Use POSIX to perform I/O with a RAM buffer, and use +hipMemcpy to transfer data between RAM and the GPU(s). +Data is copied from GPU to RAM before a write and copied +from RAM to GPU after a read. \fBverify\fR does not affect +the use of hipMemcpy. +.RE +.RE +.TP .BI (dfs)pool Specify the label or UUID of the DAOS pool to connect to. .TP
optgroup.c +4 -0
@@ -185,6 +185,10 @@ static const struct opt_group fio_opt_cat_groups[] = { .name = "NFS I/O engine", /* nfs */ .mask = FIO_OPT_G_NFS, }, + { + .name = "libhipfile I/O engine", /* libhipfile */ + .mask = FIO_OPT_G_LIBHIPFILE, + }, { .name = NULL, },
optgroup.h +2 -0
@@ -73,6 +73,7 @@ enum opt_category_group { __FIO_OPT_G_WINDOWSAIO, __FIO_OPT_G_XNVME, __FIO_OPT_G_LIBBLKIO, + __FIO_OPT_G_LIBHIPFILE,FIO_OPT_G_RATE = (1ULL << __FIO_OPT_G_RATE), FIO_OPT_G_ZONE = (1ULL << __FIO_OPT_G_ZONE),
@@ -120,6 +121,7 @@ enum opt_category_group {FIO_OPT_G_WINDOWSAIO = (1ULL << __FIO_OPT_G_WINDOWSAIO),FIO_OPT_G_XNVME = (1ULL << __FIO_OPT_G_XNVME),FIO_OPT_G_LIBBLKIO = (1ULL << __FIO_OPT_G_LIBBLKIO), + FIO_OPT_G_LIBHIPFILE = (1ULL << __FIO_OPT_G_LIBHIPFILE), };extern const struct opt_group *opt_group_from_mask (uint64_t *mask);