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ARM: rockchip: smp: enable CPU1 for rk3066a

PATCH In review Johan Jonker 2 participants 4 messages Aug 28 – Oct 2

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#0 lore raw

PATCH 1/1 ARM: rockchip: smp: enable CPU1 for rk3066a

From: Hüseyin BIYIK <[email protected]>

RK3066a CPU1 fails to come online. Fix by using
a similar mailbox construction as in use with
other Rockchip SoCs.

---
 arch/arm/mach-rockchip/platsmp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/mach-rockchip/platsmp.c +2 -1
index f659d894bfae..d7d080c29f3c 100644
@@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
 	if (ret < 0)
 		return ret;
 
-	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
+	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
+	    of_machine_is_compatible("rockchip,rk3066a")) {
 		/*
 		 * We communicate with the bootrom to active the cpus other
 		 * than cpu0, after a blob of initialize code, they will

---
base-commit: 2709dd5ae32f0828f386327c76bba9f39f63a1c6
change-id: 20260829-cpu-c518bde9b473

Best regards,

Signature · 1 line
Johan Jonker <[email protected]>
maintainer
#1 lore raw

Am Samstag, 29. August 2026, 01:40:57 Mitteleuropäische Sommerzeit schrieb Johan Jonker via B4 Relay:

Quoted 5 lines

From: Hüseyin BIYIK <[email protected]>

RK3066a CPU1 fails to come online. Fix by using
a similar mailbox construction as in use with
other Rockchip SoCs.

"RK3066 CPU1 fails to come online with recent kernels....[rest]" or so and also please use the line length up a resonable length like around 70 to 75 characters.

Also, is it known, why that happens - i.e. what changed?

Quoted 11 lines
---
 arch/arm/mach-rockchip/platsmp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/mach-rockchip/platsmp.c +0 -0
index f659d894bfae..d7d080c29f3c 100644

arch/arm/mach-rockchip/platsmp.c static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle) · line 140

Quoted 9 lines
arch/arm/mach-rockchip/platsmp.c +2 -1
@@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
 	if (ret < 0)
 		return ret;
 
-	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
+	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
+	    of_machine_is_compatible("rockchip,rk3066a")) {
 		/*
 		 * We communicate with the bootrom to active the cpus other
 		 * than cpu0, after a blob of initialize code, they will

isn't now the only user of the old system the RK3188?

With both rk3066 and rk3188 from a similar time, I'd assume both could be switch and thus the the now unused code removed?

I've never thought to look into that ... need to find my RK3188 board :-)

Heiko

#2 lore raw

Hi,

Quoted 9 lines · Heiko Stübner

Am Samstag, 29. August 2026, 01:40:57 Mitteleuropäische Sommerzeit schrieb Johan Jonker via B4 Relay:

Quoted 5 lines

From: Hüseyin BIYIK <[email protected]>

RK3066a CPU1 fails to come online. Fix by using
a similar mailbox construction as in use with
other Rockchip SoCs.

"RK3066 CPU1 fails to come online with recent kernels....[rest]" or so

Not recent..

Quoted 3 lines

and also please use the line length up a resonable length like around 70> to 75 characters.

Also, is it known, why that happens - i.e. what changed?

What loader chain did you use then?

This guessing!!!:
From TRM: RK PX2/rk3066a supports to boot from internal bootrom or embedded SRAM Currently rk3066 U-boot doesn't remap, so we end up in ROM code waiting for deadbeaf:

void main(void)

{
        deadbeaf = 1;
        if ( !(__mrc(15, 0, 0, 0, 5) & 0xF) )
        {
                __set_CPSR(0xD2u);
                __set_CPSR(0xD3u);
                DELAY_write(24);
                CRU_CLKSEL();
                DELAY(10000);
                MAIN_LOOP1x4();
                DNL_LOOP();
                while ( 1 )
                        ;
        }
        __set_CPSR(0xD3u);
        while ( deadbeaf != 0xDEADBEAF )
                __wfe();
        secondary_startup();
}

Can't put a precise time tag on it since when.
Let us lead by what current available open source loaders solutions can do. Please advise here.
How far does a fixes tag have to go back?

Quoted 25 lines
Quoted 12 lines
---
 arch/arm/mach-rockchip/platsmp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/mach-rockchip/platsmp.c +0 -0
index f659d894bfae..d7d080c29f3c 100644

arch/arm/mach-rockchip/platsmp.c static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle) · line 140

Quoted 9 lines
arch/arm/mach-rockchip/platsmp.c +2 -1
@@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
 	if (ret < 0)
 		return ret;
 
-	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
+	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
+	    of_machine_is_compatible("rockchip,rk3066a")) {
 		/*
 		 * We communicate with the bootrom to active the cpus other
 		 * than cpu0, after a blob of initialize code, they will

isn't now the only user of the old system the RK3188?

Quoted 5 lines

With both rk3066 and rk3188 from a similar time, I'd assume both could be switch and thus the the now unused code removed?

I've never thought to look into that ... need to find my RK3188 board :-)

Let me know what rk3188 U-boot and Kernel end up with how many CPUs, so we can remove the "if" condition altogether.

Johan

Quoted 5 lines

Heiko

===========

https://github.com/armhoff/u-boot-rockchip/blob/u-boot-rk3066-sdcard/board/rockchip/common/platform/rk30/romloader.s#L110
https://github.com/paweljarosz82/u-boot-rk3066/blob/wip/rk3066-8/arch/arm/mach-rockchip/rk3066-board.c#L32

maintainer
#3 lore raw

Hi Johan,

Am Sonntag, 30. August 2026, 13:17:15 Mitteleuropäische Sommerzeit schrieb Johan Jonker:

Quoted 45 lines · Heiko Stübner
Quoted 9 lines

Am Samstag, 29. August 2026, 01:40:57 Mitteleuropäische Sommerzeit schrieb Johan Jonker via B4 Relay:

Quoted 5 lines

From: Hüseyin BIYIK <[email protected]>

RK3066a CPU1 fails to come online. Fix by using
a similar mailbox construction as in use with
other Rockchip SoCs.

"RK3066 CPU1 fails to come online with recent kernels....[rest]" or so

Not recent..

Quoted 3 lines

and also please use the line length up a resonable length like around 70> to 75 characters.

Also, is it known, why that happens - i.e. what changed?

What loader chain did you use then?

This guessing!!!:
From TRM: RK PX2/rk3066a supports to boot from internal bootrom or embedded SRAM Currently rk3066 U-boot doesn't remap, so we end up in ROM code waiting for deadbeaf:

void main(void)

{
        deadbeaf = 1;
        if ( !(__mrc(15, 0, 0, 0, 5) & 0xF) )
        {
                __set_CPSR(0xD2u);
                __set_CPSR(0xD3u);
                DELAY_write(24);
                CRU_CLKSEL();
                DELAY(10000);
                MAIN_LOOP1x4();
                DNL_LOOP();
                while ( 1 )
                        ;
        }
        __set_CPSR(0xD3u);
        while ( deadbeaf != 0xDEADBEAF )
                __wfe();
        secondary_startup();
}
Quoted 4 lines

Can't put a precise time tag on it since when.
Let us lead by what current available open source loaders solutions can do. Please advise here.
How far does a fixes tag have to go back?

So ... found time to test a bit:
- Both my Marsboard (RK3066) and Radxa Rock (RK3188) currently have a u-boot that is really old ... 2017.09 / 2017.11 to be exact.
- Both boards can bring up the other cores just fine
- It seems there the remap was still enabled:
https://git.u-boot-project.org/u-boot/u-boot/-/blob/v2017.11/arch/arm/mach-rockchip/rk3188-board.c?ref_type=tags#L31
- You cannot require people to update their bootloader, only work around old versions.

Right now you end up with a meshup of different parts.
In the old codepath, sram_addr+4 contains the kernel-start-address, which now gets overwritten, breaking older loaders.

So the way forward would be:
- add code that disables remap on both rk3066+rk3188, hopefully resulting in the same behaviour indepent of the loader used
- change to use the bootrom path for all socs in rockchip_boot_secondary() so just remove the conditional around it
- drop the rockchip_smp_prepare_sram() part, as it's not needed anymore

Heiko