FAILED: patch "[PATCH] mtd: rawnand: pl353: Make sure we use the monolithic helpers" failed to apply to 6.18-stable tree
Subsystems (4)
[email protected]
maintainerThe patch below does not apply to the 6.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.18.y
git checkout FETCH_HEAD
git cherry-pick -x 80ecacd054ffeb60cd28e46ed5cd6bd0d2de318b
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026090927-cavity-motion-43b7@gregkh' --subject-prefix 'PATCH 6.18.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 80ecacd054ffeb60cd28e46ed5cd6bd0d2de318b Mon Sep 17 00:00:00 2001
From: "Miquel Raynal (DAVE)" <[email protected]>
Date: Fri, 29 May 2026 18:29:57 +0200
Subject: [PATCH] mtd: rawnand: pl353: Make sure we use the monolithic helpers
for raw accesses
Any access not using the hardware ECC engine should be monolithic because the controller has its very own way of handling the end of a transaction during operation configuration, so we cannot easily make repeated reads.
This has the side effect of fixing support for software ECC engines.
drivers/mtd/nand/raw/pl35x-nand-controller.c +3 -2
@@ -917,7 +917,6 @@ static int pl35x_nand_init_hw_ecc_controller(struct pl35x_nandc *nfc, chip->ecc.steps = mtd->writesize / chip->ecc.size; chip->ecc.read_page = pl35x_nand_read_page_hwecc; chip->ecc.write_page = pl35x_nand_write_page_hwecc; - chip->ecc.write_page_raw = nand_monolithic_write_page_raw;pl35x_smc_set_ecc_pg_size (nfc, chip, mtd->writesize); nfc->ecc_buf = devm_kmalloc(nfc->dev, chip->ecc.bytes * chip->ecc.steps,
@@ -984,7 +983,6 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)case NAND_ECC_ENGINE_TYPE_NONE :case NAND_ECC_ENGINE_TYPE_SOFT :dev_dbg (nfc->dev,"Using software ECC (Hamming 1-bit/512B)\n" ); - chip->ecc.write_page_raw = nand_monolithic_write_page_raw;break ;case NAND_ECC_ENGINE_TYPE_ON_HOST :dev_dbg (nfc->dev,"Using hardware ECC\n" );
@@ -998,6 +996,9 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)return -EINVAL ; } + chip->ecc.read_page_raw = nand_monolithic_read_page_raw; + chip->ecc.write_page_raw = nand_monolithic_write_page_raw; +return 0 ; }
Sasha Levin
maintainerPATCH 1/2 mtd: rawnand: pl353: Add message about ECC mode
From: Andrea Scian <[email protected]>
[ Upstream commit 1e06dbfdfb851170b243d6498e442b449324c664 ]
This just add some information on kernel log about the selected ECC
Stable-dep-of: 80ecacd054ff ("mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses")
--- drivers/mtd/nand/raw/pl35x-nand-controller.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/mtd/nand/raw/pl35x-nand-controller.c +3 -0
@@ -973,15 +973,18 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)switch (chip->ecc.engine_type) {case NAND_ECC_ENGINE_TYPE_ON_DIE : +dev_dbg (nfc->dev,"Using on-die ECC\n" );/* Keep these legacy BBT descriptors for ON_DIE situations */ chip->bbt_td = &bbt_main_descr; chip->bbt_md = &bbt_mirror_descr; fallthrough;case NAND_ECC_ENGINE_TYPE_NONE :case NAND_ECC_ENGINE_TYPE_SOFT : +dev_dbg (nfc->dev,"Using software ECC (Hamming 1-bit/512B)\n" ); chip->ecc.write_page_raw = nand_monolithic_write_page_raw;break ;case NAND_ECC_ENGINE_TYPE_ON_HOST : +dev_dbg (nfc->dev,"Using hardware ECC\n" ); ret =pl35x_nand_init_hw_ecc_controller (nfc, chip);if (ret)return ret;
Signature · 1 line
2.53.0
Sasha Levin
maintainerPATCH 2/2 mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses
From: "Miquel Raynal (DAVE)" <[email protected]>
[ Upstream commit 80ecacd054ffeb60cd28e46ed5cd6bd0d2de318b ]
Any access not using the hardware ECC engine should be monolithic because the controller has its very own way of handling the end of a transaction during operation configuration, so we cannot easily make repeated reads.
This has the side effect of fixing support for software ECC engines.
--- drivers/mtd/nand/raw/pl35x-nand-controller.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
drivers/mtd/nand/raw/pl35x-nand-controller.c +3 -2
@@ -914,7 +914,6 @@ static int pl35x_nand_init_hw_ecc_controller(struct pl35x_nandc *nfc, chip->ecc.steps = mtd->writesize / chip->ecc.size; chip->ecc.read_page = pl35x_nand_read_page_hwecc; chip->ecc.write_page = pl35x_nand_write_page_hwecc; - chip->ecc.write_page_raw = nand_monolithic_write_page_raw;pl35x_smc_set_ecc_pg_size (nfc, chip, mtd->writesize); nfc->ecc_buf = devm_kmalloc(nfc->dev, chip->ecc.bytes * chip->ecc.steps,
@@ -981,7 +980,6 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)case NAND_ECC_ENGINE_TYPE_NONE :case NAND_ECC_ENGINE_TYPE_SOFT :dev_dbg (nfc->dev,"Using software ECC (Hamming 1-bit/512B)\n" ); - chip->ecc.write_page_raw = nand_monolithic_write_page_raw;break ;case NAND_ECC_ENGINE_TYPE_ON_HOST :dev_dbg (nfc->dev,"Using hardware ECC\n" );
@@ -995,6 +993,9 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)return -EINVAL ; } + chip->ecc.read_page_raw = nand_monolithic_read_page_raw; + chip->ecc.write_page_raw = nand_monolithic_write_page_raw; +return 0 ; }
Signature · 1 line
2.53.0