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dt-bindings: usb: qcom,snps-dwc3: Add IPQ9650 compatible

PATCH In review Varadarajan Narayanan 2 participants 4 messages Sep 24 – Sep 30

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Varadarajan Narayanan

author
#0 lore raw

PATCH v2 1/1 dt-bindings: usb: qcom,snps-dwc3: Add IPQ9650 compatible

Add the qcom,ipq9650-dwc3 compatible for the two DWC3 USB controllers found on IPQ9650, using qcom,snps-dwc3 as the fallback compatible.

One controller is connected to a High-Speed PHY, while the other is connected to both High-Speed and SuperSpeed PHYs.

Signed-off-by Varadarajan Narayanan <[email protected]>

---
Add bindings and dwc3-qcom glue driver changes for adding support to the
two USB controllers present in IPQ9650.
---
Changes in v2:
- Rebase to top of tree
- Drop 'usb: dwc3: qcom: Allow the glue layer to pass ref_clk to the core'.
This will be taken care of the by https://lore.kernel.org/linux-arm-msm/[email protected]/
- Add ipq9650 to existing clock constraints instead of new constraints
- Link to v1: https://lore.kernel.org/r/[email protected]

---
 Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +3 -0
index 9f91c8711e02..a8fbf72c6375 100644
@@ -36,6 +36,7 @@ properties:
           - qcom,ipq8064-dwc3
           - qcom,ipq8074-dwc3
           - qcom,ipq9574-dwc3
+          - qcom,ipq9650-dwc3
           - qcom,kaanapali-dwc3
           - qcom,maili-dwc3
           - qcom,milos-dwc3

@@ -210,6 +211,7 @@ allOf:
               - qcom,ipq5210-dwc3
               - qcom,ipq5424-dwc3
               - qcom,ipq9574-dwc3
+              - qcom,ipq9650-dwc3
               - qcom,kaanapali-dwc3
               - qcom,maili-dwc3
               - qcom,msm8953-dwc3

@@ -525,6 +527,7 @@ allOf:
               - qcom,ipq5210-dwc3
               - qcom,ipq5424-dwc3
               - qcom,ipq9574-dwc3
+              - qcom,ipq9650-dwc3
     then:
       properties:
         interrupts:

---
base-commit: 4d7e75152b01862a4ec598435d79a81c4b254dd6
change-id: 20260820-ctrl-6015e1503b24

Best regards,

Signature · 1 line
Varadarajan Narayanan <[email protected]>
#1 lore raw
Quoted 34 lines · Varadarajan Narayanan

Add the qcom,ipq9650-dwc3 compatible for the two DWC3 USB controllers found on IPQ9650, using qcom,snps-dwc3 as the fallback compatible.

One controller is connected to a High-Speed PHY, while the other is connected to both High-Speed and SuperSpeed PHYs.

Signed-off-by Varadarajan Narayanan <[email protected]>

---
Add bindings and dwc3-qcom glue driver changes for adding support to the
two USB controllers present in IPQ9650.
---
Changes in v2:
- Rebase to top of tree
- Drop 'usb: dwc3: qcom: Allow the glue layer to pass ref_clk to the core'.
This will be taken care of the by https://lore.kernel.org/linux-arm-msm/[email protected]/
- Add ipq9650 to existing clock constraints instead of new constraints
- Link to v1: https://lore.kernel.org/r/[email protected]

---
 Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +1 -0
index 9f91c8711e02..a8fbf72c6375 100644
@@ -36,6 +36,7 @@ properties:
           - qcom,ipq8064-dwc3
           - qcom,ipq8074-dwc3
           - qcom,ipq9574-dwc3
+          - qcom,ipq9650-dwc3
           - qcom,kaanapali-dwc3
           - qcom,maili-dwc3
           - qcom,milos-dwc3

Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml allOf: · line 214

Quoted 4 lines
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +1 -0
@@ -210,6 +211,7 @@ allOf:
               - qcom,ipq5210-dwc3
               - qcom,ipq5424-dwc3
               - qcom,ipq9574-dwc3
+              - qcom,ipq9650-dwc3

You had 6 clocks before, now only 5. Not explained in the changelog.

Best regards,
Krzysztof

author
#2 lore raw
Quoted 33 lines · Krzysztof Kozlowski
Quoted 32 lines · Varadarajan Narayanan

Add the qcom,ipq9650-dwc3 compatible for the two DWC3 USB controllers found on IPQ9650, using qcom,snps-dwc3 as the fallback compatible.

One controller is connected to a High-Speed PHY, while the other is connected to both High-Speed and SuperSpeed PHYs.

Signed-off-by Varadarajan Narayanan <[email protected]>

---
Add bindings and dwc3-qcom glue driver changes for adding support to the
two USB controllers present in IPQ9650.
---
Changes in v2:
- Rebase to top of tree
- Drop 'usb: dwc3: qcom: Allow the glue layer to pass ref_clk to the core'.
This will be taken care of the by https://lore.kernel.org/linux-arm-msm/[email protected]/
- Add ipq9650 to existing clock constraints instead of new constraints
- Link to v1: https://lore.kernel.org/r/[email protected]

---
 Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +1 -0
index 9f91c8711e02..a8fbf72c6375 100644
@@ -36,6 +36,7 @@ properties:
           - qcom,ipq8064-dwc3
           - qcom,ipq8074-dwc3
           - qcom,ipq9574-dwc3
+          - qcom,ipq9650-dwc3
           - qcom,kaanapali-dwc3
           - qcom,maili-dwc3
Quoted 8 lines

Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml allOf: · line 214

Quoted 6 lines
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +1 -0
           - qcom,milos-dwc3

@@ -210,6 +211,7 @@ allOf:
               - qcom,ipq5210-dwc3
               - qcom,ipq5424-dwc3
               - qcom,ipq9574-dwc3
+              - qcom,ipq9650-dwc3

You had 6 clocks before, now only 5. Not explained in the changelog.

Sorry about not being explicit in the change log. The additional clock was supposed to be passed to the dwc3 core layer for it to get the reference clock rate. Have dropped that in favour of using [1].

Since '[PATCH 2/2] usb: dwc3: qcom: Allow the glue layer to pass ref_clk to the core' (please see [2]) was dropped, don't need the additional clock.

Hence the change from 6 clocks to 5.

1 - https://lore.kernel.org/linux-arm-msm/[email protected]/

2 - https://lore.kernel.org/linux-arm-msm/[email protected]/

Thanks
Varada

Reviewed-by on v2 1/1
#3 lore raw
In reply to Varadarajan Narayanan
Quoted 8 lines · Varadarajan Narayanan

Add the qcom,ipq9650-dwc3 compatible for the two DWC3 USB controllers found on IPQ9650, using qcom,snps-dwc3 as the fallback compatible.

One controller is connected to a High-Speed PHY, while the other is connected to both High-Speed and SuperSpeed PHYs.

Signed-off-by Varadarajan Narayanan <[email protected]>

---

Reviewed-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof