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arm64: dts: qcom: shikra: fix sdhc interrupts property

PATCH Applied Arnd Bergmann 4 participants 4 messages Sep 29 – Oct 1

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Arnd Bergmann

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PATCH 1/1 arm64: dts: qcom: shikra: fix sdhc interrupts property

From: Arnd Bergmann <[email protected]>

The gicv3 on this chip uses a 4-cell interrupt specifier, which includes the affinity, but the newly added mmc node uses the 3-cell format:

arch/arm64/boot/dts/qcom/shikra.dtsi:4151.4-27: Warning (interrupts_property): /soc@0/mmc@4784000:#interrupt-cells: size is (24), expected multiple of 16

Add a zero affinity, same as for the other I/O devices on this chip.

Fixes c8e3d40457f1 ("arm64: dts: qcom: shikra: Add SD Card support")
Signed-off-by Arnd Bergmann <[email protected]>
---
 arch/arm64/boot/dts/qcom/shikra.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/shikra.dtsi +2 -2
index 9823c591b02b..1814ab33e236 100644
@@ -1470,8 +1470,8 @@ sdhc_2: mmc@4784000 {
 			compatible = "qcom,shikra-sdhci", "qcom,sdhci-msm-v5";
 			reg = <0x0 0x04784000 0x0 0x1000>;
 
-			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 0>,
+				     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0>;
 			interrupt-names = "hc_irq",
 					  "pwr_irq";
Signature · 1 line
2.53.0
Reviewed-by on v1 1/1
#1 lore raw
Quoted 6 lines · Arnd Bergmann

From: Arnd Bergmann <[email protected]>

The gicv3 on this chip uses a 4-cell interrupt specifier, which includes the affinity, but the newly added mmc node uses the 3-cell format:

Quoted 6 lines

arch/arm64/boot/dts/qcom/shikra.dtsi:4151.4-27: Warning (interrupts_property): /soc@0/mmc@4784000:#interrupt-cells: size is (24), expected multiple of 16

Add a zero affinity, same as for the other I/O devices on this chip.

Fixes c8e3d40457f1 ("arm64: dts: qcom: shikra: Add SD Card support")
Signed-off-by Arnd Bergmann <[email protected]>
Reviewed-by Abel Vesa <[email protected]>
Reviewed-by on v1 1/1
#2 lore raw
In reply to Arnd Bergmann
Quoted 6 lines · Arnd Bergmann

From: Arnd Bergmann <[email protected]>

The gicv3 on this chip uses a 4-cell interrupt specifier, which includes the affinity, but the newly added mmc node uses the 3-cell format:

Quoted 7 lines

arch/arm64/boot/dts/qcom/shikra.dtsi:4151.4-27: Warning (interrupts_property): /soc@0/mmc@4784000:#interrupt-cells: size is (24), expected multiple of 16

Add a zero affinity, same as for the other I/O devices on this chip.

Fixes c8e3d40457f1 ("arm64: dts: qcom: shikra: Add SD Card support")
Signed-off-by Arnd Bergmann <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

maintainer Applied
#3 lore raw
In reply to Arnd Bergmann
Quoted 9 lines · Arnd Bergmann

The gicv3 on this chip uses a 4-cell interrupt specifier, which includes the affinity, but the newly added mmc node uses the 3-cell format:

arch/arm64/boot/dts/qcom/shikra.dtsi:4151.4-27: Warning (interrupts_property): /soc@0/mmc@4784000:#interrupt-cells: size is (24), expected multiple of 16

Add a zero affinity, same as for the other I/O devices on this chip.

[...]

Applied, thanks!

[1/1] arm64: dts: qcom: shikra: fix sdhc interrupts property

      commit: 7ee8eb0ebeef2e7bbf2ec8ebc43bf43f2a10a1d7

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>