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rockchip: rk3528: Add FriendlyElec NanoPi R28S

PATCH In review 安容 2 participants 10 messages Nov 3 – Nov 10

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#0 lore raw

v3 cover rockchip: rk3528: Add FriendlyElec NanoPi R28S

The FriendlyElec NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. It shares most of its design with the NanoPi Zero2.

The Linux devicetree and bindings for the board are now in mainline Linux and devicetree-rebasing. Import the three relevant commits with U-Boot's tools/update-subtree.sh pick dts command, retaining their upstream commit references:

e9eafc0ca521
f7f1ea96945d
d0f6e37c635b

Patches 1-3 import the bindings and devicetrees into dts/upstream. Patch 4 moves the U-Boot specific parts of the NanoPi Zero2 into a common rk3528-nanopi-u-boot.dtsi, following the split in Linux.

Notes that Assisted-by: LLM tag is not required anymore since Linux 7.4, so checkpatch reports error for these patches. I have no idea about how to deal with it, so I keep them as is. If I did wrong, please tell me what should I do instead.

Patch 5 adds a NanoPi RK3528 board target that reads the HW_ID on SARADC channel 2 to select the FDT in SPL and set fdtfile, in the same way as the Radxa ROCK 2 board target, and moves the NanoPi Zero2 to it.

Patch 6 adds the NanoPi R28S to that board target, so that nanopi-zero2-rk3528_defconfig supports both boards.

Build-tested with aarch64-linux-gnu-gcc using nanopi-zero2-rk3528_defconfig and BINMAN_ALLOW_MISSING=1. U-Boot and SPL compile, and the FIT contains both Zero2 and R28S devicetrees. BL31 and Rockchip TPL were not supplied, so the generated images are not bootable. No new hardware testing was performed.

---
Changes in v3:
- Rebase onto U-Boot mainline ab4dc5aacf9
- Import the mainline bindings and devicetrees with update-subtree.sh
- Widen the HW_ID ADC ranges to the buckets used by the FriendlyElec vendor U-Boot (Quentin)
- Merge the R28S MAINTAINERS entry into the NanoPi RK3528 entry
(Quentin)
- Collect Reviewed-by tags
- Link to v2: https://patch.msgid.link/[email protected]

Changes in v2:
- Add a common NanoPi RK3528 board target that selects the FDT using
the HW_ID on SARADC channel 2, instead of adding a new defconfig for the R28S (Jonas)
- Add Jonas Karlman as reviewer for the R28S.
- Link to v1: https://patch.msgid.link/[email protected]

---
安容 (6):
dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S
arm64: dts: rockchip: Split out the common NanoPi RK3528 parts
arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S
rockchip: rk3528: Split out common NanoPi u-boot.dtsi
board: rockchip: Add common NanoPi RK3528 board target
board: rockchip: Add FriendlyElec NanoPi R28S

 arch/arm/dts/rk3528-nanopi-r28s-u-boot.dtsi        |   3 +
 arch/arm/dts/rk3528-nanopi-u-boot.dtsi             |  16 ++
 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi       |  10 +-
 arch/arm/mach-rockchip/rk3528/Kconfig              |   7 +
 arch/arm/mach-rockchip/rk3528/MAINTAINERS          |   6 -
 board/friendlyelec/nanopi-rk3528/Kconfig           |  14 +
 board/friendlyelec/nanopi-rk3528/MAINTAINERS       |   9 +
 board/friendlyelec/nanopi-rk3528/Makefile          |   3 +
 board/friendlyelec/nanopi-rk3528/nanopi-rk3528.c   |  60 +++++
 configs/nanopi-zero2-rk3528_defconfig              |   3 +
 doc/board/rockchip/rockchip.rst                    |   2 +-
 dts/upstream/Bindings/arm/rockchip.yaml            |  12 +-
 .../src/arm64/rockchip/rk3528-nanopi-r28s.dts      | 160 +++++++++++
 .../src/arm64/rockchip/rk3528-nanopi-zero2.dts     | 290 +-------------------
 dts/upstream/src/arm64/rockchip/rk3528-nanopi.dtsi | 291 +++++++++++++++++++++
 15 files changed, 580 insertions(+), 306 deletions(-)

---
base-commit: ab4dc5aacf957835c295b59ef2dd28281839cb20
change-id: 20261012-nanopi-r28s-0adc0003f445

Best regards,

Signature · 1 line
安容 <[email protected]>
author
#1 lore raw

PATCH v3 1/6 dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S

The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. It shares its base devicetree with the NanoPi Zero2, so fold both boards into a single RK3528 series entry, which further RK3528 based NanoPi boards can join without renaming it.

[ upstream commit: bdcf29a379afecc02c3e99c0d1745363ad7a7407 ]

(cherry picked from commit e9eafc0ca521c8d12e1a65b43f899e336ef28eba)

---
 dts/upstream/Bindings/arm/rockchip.yaml | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)
dts/upstream/Bindings/arm/rockchip.yaml +7 -5
index a799bb843f7..a1f000b1bee 100644
@@ -340,6 +340,13 @@ properties:
               - friendlyarm,nanopi-r2s-plus
           - const: rockchip,rk3328
 
+      - description: FriendlyElec NanoPi RK3528 series boards
+        items:
+          - enum:
+              - friendlyarm,nanopi-r28s
+              - friendlyarm,nanopi-zero2
+          - const: rockchip,rk3528
+
       - description: FriendlyElec NanoPi R3S
         items:
           - const: friendlyarm,nanopi-r3s
@@ -381,11 +388,6 @@ properties:
           - const: friendlyarm,nanopi-r76s
           - const: rockchip,rk3576
 
-      - description: FriendlyElec NanoPi Zero2
-        items:
-          - const: friendlyarm,nanopi-zero2
-          - const: rockchip,rk3528
-
       - description: FriendlyElec NanoPC T6 series boards
         items:
           - enum:
Signature · 1 line
2.56.0
Reviewed-by on v3 1/6
#2 lore raw

Re: [PATCH v3 1/6] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S

Hi 安容,

Quoted 7 lines · On 11/3/26 11:37 AM, 安容 via B4 Relay wrote:

From: 安容 <[email protected]>

The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. It shares its base devicetree with the NanoPi Zero2, so fold both boards into a single RK3528 series entry, which further RK3528 based NanoPi boards can join without renaming it.

Quoted 8 lines

[ upstream commit: bdcf29a379afecc02c3e99c0d1745363ad7a7407 ]

(cherry picked from commit e9eafc0ca521c8d12e1a65b43f899e336ef28eba)

Thanks!
Quentin

author
#3 lore raw

PATCH v3 2/6 arm64: dts: rockchip: Split out the common NanoPi RK3528 parts

In reply to 安容

The FriendlyElec NanoPi Zero2 and the NanoPi R28S share their power tree, storage, RGMII Ethernet, RTC, LEDs and debug console. Move those parts into rk3528-nanopi.dtsi so the NanoPi R28S can reuse them, and leave only the board specific nodes in the NanoPi Zero2 devicetree.

Both boards drive a green LED from GPIO4_PB1, but give it a different purpose, so the common file describes the LED itself and each board adds the function, trigger and default state. While moving the LED pins give them the usual _pin suffix, which frees the led1 label for the LED node.

[ upstream commit: fdb087806e808ccc4963e2e5225fe16581ecb421 ]

(cherry picked from commit f7f1ea96945deee8bbadfd0737706ce770315342)

---
 .../src/arm64/rockchip/rk3528-nanopi-zero2.dts     | 290 +-------------------
 dts/upstream/src/arm64/rockchip/rk3528-nanopi.dtsi | 291 +++++++++++++++++++++
 2 files changed, 296 insertions(+), 285 deletions(-)
dts/upstream/src/arm64/rockchip/rk3528-nanopi-zero2.dts +5 -285
index 97d85124d21..05ae03622e8 100644
@@ -2,41 +2,12 @@
 
 /dts-v1/;
 
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3528.dtsi"
+#include "rk3528-nanopi.dtsi"
 
 / {
 	model = "FriendlyElec NanoPi Zero2";
 	compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";
 
-	aliases {
-		ethernet0 = &gmac1;
-		i2c1 = &i2c1;
-		mmc0 = &sdhci;
-		mmc1 = &sdmmc;
-		serial0 = &uart0;
-	};
-
-	chosen {
-		stdout-path = "serial0:1500000n8";
-	};
-
-	adc-keys-0 {
-		compatible = "adc-keys";
-		io-channels = <&saradc 0>;
-		io-channel-names = "buttons";
-		keyup-threshold-microvolt = <1800000>;
-		poll-interval = <100>;
-
-		button-maskrom {
-			label = "MASK";
-			linux,code = <KEY_SETUP>;
-			press-threshold-microvolt = <0>;
-		};
-	};
-
 	adc-keys-1 {
 		compatible = "adc-keys";
 		io-channels = <&saradc 1>;
@@ -51,28 +22,6 @@
 		};
 	};
 
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led1>, <&led_sys>;
-
-		led-0 {
-			color = <LED_COLOR_ID_RED>;
-			default-state = "on";
-			function = LED_FUNCTION_HEARTBEAT;
-			gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		led-1 {
-			color = <LED_COLOR_ID_GREEN>;
-			default-state = "on";
-			function = LED_FUNCTION_STATUS;
-			gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "default-on";
-		};
-	};
-
 	vcc0v6_ddr: regulator-0v6-vcc-ddr {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc0v6_ddr";
@@ -83,66 +32,6 @@
 		vin-supply = <&vcc5v0_sys>;
 	};
 
-	vdd_0v9: regulator-0v9-vdd {
-		compatible = "regulator-fixed";
-		regulator-name = "vdd_0v9";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <900000>;
-		regulator-max-microvolt = <900000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc_ddr: regulator-1v1-vcc-ddr {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_ddr";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1100000>;
-		regulator-max-microvolt = <1100000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc_1v8: regulator-1v8-vcc {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_1v8";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc_3v3>;
-	};
-
-	vcc_3v3: regulator-3v3-vcc {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_3v3";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vcc3v3_sd: regulator-3v3-vcc-sd {
-		compatible = "regulator-fixed";
-		gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&sdmmc_pwren_l>;
-		regulator-name = "vcc3v3_sd";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc_3v3>;
-	};
-
-	vcc5v0_sys: regulator-5v0-vcc-sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
 	usb2_host_5v: regulator-5v0-usb2-host {
 		compatible = "regulator-fixed";
 		enable-active-high;
@@ -154,138 +43,15 @@
 		regulator-max-microvolt = <5000000>;
 		vin-supply = <&vcc5v0_sys>;
 	};
-
-	vccio_sd: regulator-vccio-sd {
-		compatible = "regulator-gpio";
-		gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&sdmmc_vol_ctrl_h>;
-		regulator-name = "vccio_sd";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <3300000>;
-		states = <1800000 0x0>, <3300000 0x1>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	vdd_arm: regulator-vdd-arm {
-		compatible = "pwm-regulator";
-		pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
-		pwm-supply = <&vcc5v0_sys>;
-		regulator-name = "vdd_arm";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <746000>;
-		regulator-max-microvolt = <1201000>;
-		regulator-settling-time-up-us = <250>;
-	};
-
-	vdd_logic: regulator-vdd-logic {
-		compatible = "pwm-regulator";
-		pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
-		pwm-supply = <&vcc5v0_sys>;
-		regulator-name = "vdd_logic";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <705000>;
-		regulator-max-microvolt = <1006000>;
-		regulator-settling-time-up-us = <250>;
-	};
-};
-
-&cpu0 {
-	cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
-	cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
-	cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
-	cpu-supply = <&vdd_arm>;
 };
 
-&gmac1 {
-	clock_in_out = "output";
-	phy-handle = <&rgmii_phy>;
-	phy-mode = "rgmii-id";
-	phy-supply = <&vcc_3v3>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
-		    <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_logic>;
-	status = "okay";
-};
-
-&i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1m0_xfer>;
-	status = "okay";
-
-	hym8563: rtc@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		#clock-cells = <0>;
-		interrupt-parent = <&gpio4>;
-		interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&rtc_int_l>;
-		wakeup-source;
-	};
-};
-
-&mdio1 {
-	rgmii_phy: ethernet-phy@1 {
-		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&gmac1_rstn_l>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
-	};
+&led1 {
+	default-state = "on";
+	function = LED_FUNCTION_STATUS;
+	linux,default-trigger = "default-on";
 };
 
 &pinctrl {
-	ethernet {
-		gmac1_rstn_l: gmac1-rstn-l {
-			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	leds {
-		led1: led1 {
-			rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		led_sys: led-sys {
-			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	rtc {
-		rtc_int_l: rtc-int-l {
-			rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	sdmmc {
-		sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
-			rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		sdmmc_pwren_l: sdmmc-pwren-l {
-			rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
 	usb {
 		usb20_host1_pwren: usb20-host1-pwren {
 			rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -293,52 +59,6 @@
 	};
 };
 
-&pwm1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pwm1m0_pins>;
-	status = "okay";
-};
-
-&pwm2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pwm2m0_pins>;
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	cap-mmc-highspeed;
-	mmc-hs200-1_8v;
-	no-sd;
-	no-sdio;
-	non-removable;
-	vmmc-supply = <&vcc_3v3>;
-	vqmmc-supply = <&vcc_1v8>;
-	status = "okay";
-};
-
-&sdmmc {
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	disable-wp;
-	sd-uhs-sdr104;
-	vmmc-supply = <&vcc3v3_sd>;
-	vqmmc-supply = <&vccio_sd>;
-	status = "okay";
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0m0_xfer>;
-	status = "okay";
-};
-
 &usb_host0_ehci {
 	status = "okay";
 };
dts/upstream/src/arm64/rockchip/rk3528-nanopi.dtsi new file +291 -0

291 lines not on this page · raw message

Signature · 1 line
2.56.0
Reviewed-by on v3 2/6
#4 lore raw

Re: [PATCH v3 2/6] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts

Hi 安容,

Quoted 13 lines · On 11/3/26 11:37 AM, 安容 via B4 Relay wrote:

From: 安容 <[email protected]>

The FriendlyElec NanoPi Zero2 and the NanoPi R28S share their power tree, storage, RGMII Ethernet, RTC, LEDs and debug console. Move those parts into rk3528-nanopi.dtsi so the NanoPi R28S can reuse them, and leave only the board specific nodes in the NanoPi Zero2 devicetree.

Both boards drive a green LED from GPIO4_PB1, but give it a different purpose, so the common file describes the LED itself and each board adds the function, trigger and default state. While moving the LED pins give them the usual _pin suffix, which frees the led1 label for the LED node.

Quoted 8 lines

[ upstream commit: fdb087806e808ccc4963e2e5225fe16581ecb421 ]

(cherry picked from commit f7f1ea96945deee8bbadfd0737706ce770315342)

Thanks!
Quentin

author
#5 lore raw

PATCH v3 3/6 arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S

In reply to 安容

The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC, designed and developed by FriendlyElec. It shares most of its design with the NanoPi Zero2, so it builds on the common rk3528-nanopi.dtsi.

Specification:
- Rockchip RK3528
- 1GB RAM
- eMMC socket (optional)
- MicroSD slot
- 1x 1000Base-T (GMAC1, Realtek RTL8211F)
- 1x 1000Base-T (PCIe, Realtek RTL8111H)
- AICSemi AIC8800D80 SDIO WiFi + Bluetooth
- 3x LEDs (SYS, LAN, WAN)
- 1x USB 2.0 Type-C OTG, shared with the 5V power input
- User and MaskROM buttons
- Haoyu HYM8563 RTC
- 1x USB Type-C debug UART (onboard WCH CH340E)

The AIC8800D80 has no upstream driver yet, so only the SDIO and UART controllers it hangs off are enabled, along with the WiFi and Bluetooth wake and power pins taken from the schematics.

[ upstream commit: c1e23f3425c49fe22e9598f8eea2fcf693950d50 ]

(cherry picked from commit d0f6e37c635be183ff10d8a0291f54afd1365f30)

---
 .../src/arm64/rockchip/rk3528-nanopi-r28s.dts      | 160 +++++++++++++++++++++
 1 file changed, 160 insertions(+)
dts/upstream/src/arm64/rockchip/rk3528-nanopi-r28s.dts new file +160 -0
new file mode 100644
index 00000000000..294b66f60e4
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd.
+ * Copyright (c) 2026 安容 <[email protected]>
+ */
+
+/dts-v1/;
+
+#include "rk3528-nanopi.dtsi"
+
+/ {
+	model = "FriendlyElec NanoPi R28S";
+	compatible = "friendlyarm,nanopi-r28s", "rockchip,rk3528";
+
+	aliases {
+		mmc2 = &sdio0;
+		serial2 = &uart2;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&gpio4_b2_usr_btn>;
+
+		button-user {
+			debounce-interval = <50>;
+			gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+			label = "USER";
+			linux,code = <BTN_1>;
+			wakeup-source;
+		};
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_wf>;
+		post-power-on-delay-ms = <100>;
+		reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&combphy {
+	status = "okay";
+};
+
+&led1 {
+	default-state = "off";
+	function = LED_FUNCTION_WAN;
+	linux,default-trigger = "netdev";
+};
+
+&leds {
+	pinctrl-names = "default";
+	pinctrl-0 = <&led_sys_pin>, <&led1_pin>, <&led2_pin>;
+
+	led-2 {
+		color = <LED_COLOR_ID_GREEN>;
+		default-state = "off";
+		function = LED_FUNCTION_LAN;
+		gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+		linux,default-trigger = "netdev";
+	};
+};
+
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_eth_perstb>;
+	reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc_3v3>;
+	status = "okay";
+};
+
+&pinctrl {
+	bluetooth {
+		bt_wake_host: bt-wake-host {
+			rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		host_wake_bt: host-wake-bt {
+			rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	gpio-keys {
+		gpio4_b2_usr_btn: gpio4-b2-usr-btn {
+			rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	leds {
+		led2_pin: led2-pin {
+			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pcie {
+		pcie_eth_perstb: pcie-eth-perstb {
+			rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wifi {
+		host_wake_wl: host-wake-wl {
+			rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		pwr_wf: pwr-wf {
+			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		wl_wake_host: wl-wake-host {
+			rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+};
+
+&sdio0 {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	no-mmc;
+	no-sd;
+	non-removable;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc_3v3>;
+	vqmmc-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&uart2 {
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
+&usb_host0_xhci {
+	/*
+	 * The Type-C port is also the 5V power input, so it comes up as a
+	 * device, but host mode works with an externally powered hub.
+	 */
+	extcon = <&usb2phy>;
+	maximum-speed = "high-speed";
+	phys = <&usb2phy_otg>;
+	phy-names = "usb2-phy";
+	status = "okay";
+};
+
+&usb2phy {
+	status = "okay";
+};
+
+&usb2phy_otg {
+	status = "okay";
+};
Signature · 1 line
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Reviewed-by on v3 3/6
#6 lore raw

Re: [PATCH v3 3/6] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S

Hi 安容,

Quoted 25 lines · On 11/3/26 11:37 AM, 安容 via B4 Relay wrote:

From: 安容 <[email protected]>

The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC, designed and developed by FriendlyElec. It shares most of its design with the NanoPi Zero2, so it builds on the common rk3528-nanopi.dtsi.

Specification:
- Rockchip RK3528
- 1GB RAM
- eMMC socket (optional)
- MicroSD slot
- 1x 1000Base-T (GMAC1, Realtek RTL8211F)
- 1x 1000Base-T (PCIe, Realtek RTL8111H)
- AICSemi AIC8800D80 SDIO WiFi + Bluetooth
- 3x LEDs (SYS, LAN, WAN)
- 1x USB 2.0 Type-C OTG, shared with the 5V power input
- User and MaskROM buttons
- Haoyu HYM8563 RTC
- 1x USB Type-C debug UART (onboard WCH CH340E)

The AIC8800D80 has no upstream driver yet, so only the SDIO and UART controllers it hangs off are enabled, along with the WiFi and Bluetooth wake and power pins taken from the schematics.

Quoted 8 lines

[ upstream commit: c1e23f3425c49fe22e9598f8eea2fcf693950d50 ]

(cherry picked from commit d0f6e37c635be183ff10d8a0291f54afd1365f30)

Thanks!
Quentin

author
#7 lore raw

PATCH v3 4/6 rockchip: rk3528: Split out common NanoPi u-boot.dtsi

In reply to 安容

The Linux devicetree of the NanoPi Zero2 has been split into a common rk3528-nanopi.dtsi, which the NanoPi R28S builds on. Both boards use the same PWM regulators for vdd_arm and vdd_logic.

Move the U-Boot specific parts of the NanoPi Zero2 into a common rk3528-nanopi-u-boot.dtsi in the same way, so that the NanoPi R28S can include it instead of duplicating it. No functional change.

---
 arch/arm/dts/rk3528-nanopi-u-boot.dtsi       | 11 +++++++++++
 arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi | 10 +---------
 arch/arm/mach-rockchip/rk3528/MAINTAINERS    |  1 +
 3 files changed, 13 insertions(+), 9 deletions(-)
arch/arm/dts/rk3528-nanopi-u-boot.dtsi new file +11 -0
new file mode 100644
index 00000000000..3e2fbd81da1
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3528-u-boot.dtsi"
+
+&vdd_arm {
+	regulator-init-microvolt = <953000>;
+};
+
+&vdd_logic {
+	regulator-init-microvolt = <900000>;
+};
arch/arm/dts/rk3528-nanopi-zero2-u-boot.dtsi +1 -9
index 3e2fbd81da1..151f1872fed 100644
@@ -1,11 +1,3 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 
-#include "rk3528-u-boot.dtsi"
-
-&vdd_arm {
-	regulator-init-microvolt = <953000>;
-};
-
-&vdd_logic {
-	regulator-init-microvolt = <900000>;
-};
+#include "rk3528-nanopi-u-boot.dtsi"
arch/arm/mach-rockchip/rk3528/MAINTAINERS +1 -0
index 95543b40dd3..d1810fb0528 100644
@@ -13,6 +13,7 @@ F:	configs/hinlink-h28k-rk3528_defconfig
 NANOPI-ZERO2-RK3528
 M:	Jonas Karlman <[email protected]>
 S:	Maintained
+F:	arch/arm/dts/rk3528-nanopi-u-boot.dtsi
 F:	arch/arm/dts/rk3528-nanopi-zero2*
 F:	configs/nanopi-zero2-rk3528_defconfig
 
Signature · 1 line
2.56.0
author
#8 lore raw

PATCH v3 5/6 board: rockchip: Add common NanoPi RK3528 board target

In reply to 安容

The board variant of the FriendlyElec NanoPi RK3528 family can be identified using the HW_ID voltage divider on SARADC channel 2.

Add a TARGET_NANOPI_RK3528 board target, based on the Radxa ROCK 2 board target, that reads HW_ID to select the FDT in SPL and to set the fdtfile env var. This allows one defconfig to support multiple NanoPi RK3528 board variants.

Move the NanoPi Zero2 to the new board target, it is the only variant for now.

---
 arch/arm/dts/rk3528-nanopi-u-boot.dtsi           |  5 ++
 arch/arm/mach-rockchip/rk3528/Kconfig            |  6 +++
 arch/arm/mach-rockchip/rk3528/MAINTAINERS        |  7 ---
 board/friendlyelec/nanopi-rk3528/Kconfig         | 14 ++++++
 board/friendlyelec/nanopi-rk3528/MAINTAINERS     |  7 +++
 board/friendlyelec/nanopi-rk3528/Makefile        |  3 ++
 board/friendlyelec/nanopi-rk3528/nanopi-rk3528.c | 59 ++++++++++++++++++++++++
 configs/nanopi-zero2-rk3528_defconfig            |  1 +
 8 files changed, 95 insertions(+), 7 deletions(-)
arch/arm/dts/rk3528-nanopi-u-boot.dtsi +5 -0
index 3e2fbd81da1..e8c8dc2f032 100644
@@ -2,6 +2,11 @@
 
 #include "rk3528-u-boot.dtsi"
 
+&saradc {
+	bootph-pre-ram;
+	vdd-microvolts = <1800000>;
+};
+
 &vdd_arm {
 	regulator-init-microvolt = <953000>;
 };
arch/arm/mach-rockchip/rk3528/Kconfig +6 -0
index 480ac2942ff..87b65d666e9 100644
@@ -1,5 +1,10 @@
 if ROCKCHIP_RK3528
 
+config TARGET_NANOPI_RK3528
+	bool "FriendlyElec NanoPi Zero2"
+	help
+	  FriendlyElec NanoPi Zero2 single board computer with a RK3528A SoC.
+
 config TARGET_RADXA_ROCK_2_RK3528
 	bool "Radxa ROCK 2A/2F"
 	help
@@ -14,6 +19,7 @@ config ROCKCHIP_STIMER_BASE
 config SYS_SOC
 	default "rk3528"
 
+source "board/friendlyelec/nanopi-rk3528/Kconfig"
 source "board/radxa/rock-2-rk3528/Kconfig"
 
 config SYS_CONFIG_NAME
arch/arm/mach-rockchip/rk3528/MAINTAINERS +0 -7
index d1810fb0528..e56108d67cb 100644
@@ -10,13 +10,6 @@ S:	Maintained
 F:	arch/arm/dts/rk3528-hinlink-h28k*
 F:	configs/hinlink-h28k-rk3528_defconfig
 
-NANOPI-ZERO2-RK3528
-M:	Jonas Karlman <[email protected]>
-S:	Maintained
-F:	arch/arm/dts/rk3528-nanopi-u-boot.dtsi
-F:	arch/arm/dts/rk3528-nanopi-zero2*
-F:	configs/nanopi-zero2-rk3528_defconfig
-
 RADXA-E20C
 M:	Jonas Karlman <[email protected]>
 S:	Maintained
board/friendlyelec/nanopi-rk3528/Kconfig new file +14 -0
new file mode 100644
index 00000000000..94b15b06691
@@ -0,0 +1,14 @@
+if TARGET_NANOPI_RK3528
+
+config SYS_BOARD
+	default "nanopi-rk3528"
+
+config SYS_VENDOR
+	default "friendlyelec"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select ADC
+	select SPL_ADC
+
+endif
board/friendlyelec/nanopi-rk3528/MAINTAINERS new file +7 -0
new file mode 100644
index 00000000000..67f14661087
@@ -0,0 +1,7 @@
+NANOPI-RK3528
+M:	Jonas Karlman <[email protected]>
+S:	Maintained
+F:	board/friendlyelec/nanopi-rk3528
+F:	arch/arm/dts/rk3528-nanopi-u-boot.dtsi
+F:	arch/arm/dts/rk3528-nanopi-zero2*
+F:	configs/nanopi-zero2-rk3528_defconfig
board/friendlyelec/nanopi-rk3528/Makefile new file +3 -0
new file mode 100644
index 00000000000..752426dcfdb
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += nanopi-rk3528.o
board/friendlyelec/nanopi-rk3528/nanopi-rk3528.c new file +59 -0

59 lines not on this page · raw message

configs/nanopi-zero2-rk3528_defconfig +1 -0
index 2c725380ef4..dde9134112f 100644
@@ -4,6 +4,7 @@ CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3528-nanopi-zero2"
 CONFIG_ROCKCHIP_RK3528=y
+CONFIG_TARGET_NANOPI_RK3528=y
 CONFIG_SYS_LOAD_ADDR=0xc00800
 CONFIG_DEBUG_UART_BASE=0xFF9F0000
 CONFIG_DEBUG_UART_CLOCK=24000000
Signature · 1 line
2.56.0
author
#9 lore raw

PATCH v3 6/6 board: rockchip: Add FriendlyElec NanoPi R28S

In reply to 安容

The FriendlyElec NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. It shares most of its design with the NanoPi Zero2.

Specifications:
- SoC: Rockchip RK3528, quad-core Cortex-A53 @ 2.0 GHz
- RAM: 1 GB LPDDR4
- Storage: microSD slot, optional onboard eMMC
- Ethernet: 1x GbE (GMAC1 + Realtek RTL8211F),
1x GbE (Realtek RTL8111H over PCIe)
- WiFi: AICSemi AIC8800D80 over SDIO
- USB: 1x USB 2.0 Type-C (power input and OTG)
- UART: USB Type-C debug console (onboard WCH CH340E), 1500000 8N1
- Buttons: user (GPIO), MaskROM (SARADC)

Add the board to the NanoPi RK3528 board target, which selects the R28S FDT based on its HW_ID, and enable CONFIG_BUTTON_GPIO for the user button.

Features tested on NanoPi R28S:
- SD-card boot
- Ethernet

---
 arch/arm/dts/rk3528-nanopi-r28s-u-boot.dtsi      | 3 +++
 arch/arm/mach-rockchip/rk3528/Kconfig            | 5 +++--
 board/friendlyelec/nanopi-rk3528/MAINTAINERS     | 2 ++
 board/friendlyelec/nanopi-rk3528/nanopi-rk3528.c | 1 +
 configs/nanopi-zero2-rk3528_defconfig            | 2 ++
 doc/board/rockchip/rockchip.rst                  | 2 +-
 6 files changed, 12 insertions(+), 3 deletions(-)
arch/arm/dts/rk3528-nanopi-r28s-u-boot.dtsi new file +3 -0
new file mode 100644
index 00000000000..151f1872fed
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3528-nanopi-u-boot.dtsi"
arch/arm/mach-rockchip/rk3528/Kconfig +3 -2
index 87b65d666e9..6e934408e56 100644
@@ -1,9 +1,10 @@
 if ROCKCHIP_RK3528
 
 config TARGET_NANOPI_RK3528
-	bool "FriendlyElec NanoPi Zero2"
+	bool "FriendlyElec NanoPi R28S/Zero2"
 	help
-	  FriendlyElec NanoPi Zero2 single board computer with a RK3528A SoC.
+	  FriendlyElec NanoPi R28S/Zero2 single board computers with a RK3528A
+	  SoC.
 
 config TARGET_RADXA_ROCK_2_RK3528
 	bool "Radxa ROCK 2A/2F"
board/friendlyelec/nanopi-rk3528/MAINTAINERS +2 -0
index 67f14661087..c2e3bbba6d7 100644
@@ -1,7 +1,9 @@
 NANOPI-RK3528
 M:	Jonas Karlman <[email protected]>
+M:	安容 <[email protected]>
 S:	Maintained
 F:	board/friendlyelec/nanopi-rk3528
 F:	arch/arm/dts/rk3528-nanopi-u-boot.dtsi
+F:	arch/arm/dts/rk3528-nanopi-r28s*
 F:	arch/arm/dts/rk3528-nanopi-zero2*
 F:	configs/nanopi-zero2-rk3528_defconfig
board/friendlyelec/nanopi-rk3528/nanopi-rk3528.c +1 -0
index 86932eab7c7..c7f2ebe32fa 100644
@@ -16,6 +16,7 @@ struct board_model {
 /* HW_ID buckets from the FriendlyElec vendor U-Boot hwrev.c */
 static const struct board_model board_models[] = {
 	{  82, 150, "rockchip/rk3528-nanopi-zero2.dtb" },
+	{ 212, 274, "rockchip/rk3528-nanopi-r28s.dtb" },
 };
 
 static const struct board_model *get_board_model(void)
configs/nanopi-zero2-rk3528_defconfig +2 -0
index dde9134112f..0af811d0ea2 100644
@@ -28,9 +28,11 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_CMD_RNG=y
 CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_OF_LIST="rockchip/rk3528-nanopi-zero2 rockchip/rk3528-nanopi-r28s"
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_BUTTON=y
 CONFIG_BUTTON_ADC=y
+CONFIG_BUTTON_GPIO=y
 # CONFIG_USB_FUNCTION_FASTBOOT is not set
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_LED=y
doc/board/rockchip/rockchip.rst +1 -1
index e22c2d6c575..bf02b700b0d 100644
@@ -103,7 +103,7 @@ List of mainline supported Rockchip boards:
 
 * rk3528
      - ArmSoM Sige1 (sige1-rk3528)
-     - FriendlyElec NanoPi Zero2 (nanopi-zero2-rk3528)
+     - FriendlyElec NanoPi R28S/Zero2 (nanopi-zero2-rk3528)
      - Generic RK3528 (generic-rk3528)
      - HINLINK H28K (hinlink-h28k-rk3528)
      - Radxa E20C (radxa-e20c-rk3528)
Signature · 1 line
2.56.0