FAILED: patch "[PATCH] lib/crypto: mips: Disable Octeon SHA code on little-endian kernels" failed to apply to 5.15-stable tree
Subsystems (2)
Sasha Levin
maintainerThe patch below does not apply to the 5.15-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.15.y
git checkout FETCH_HEAD
git cherry-pick -x dd2a4edb26e1c78823c50ba10c42f2d3de2e5ec4
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '[email protected]' --subject-prefix 'PATCH 5.15.y' 'HEAD^..'
Thanks,
Sasha
------------------ original commit in Linus's tree ------------------
From dd2a4edb26e1c78823c50ba10c42f2d3de2e5ec4 Mon Sep 17 00:00:00 2001
From: Eric Biggers <[email protected]>
Date: Wed, 21 Oct 2026 22:44:50 -0700
Subject: [PATCH] lib/crypto: mips: Disable Octeon SHA code on little-endian
kernels
Kernels built for the MIPS64-based Cavium Octeon SoCs are normally big-endian, but little-endian builds are also supported. Currently, the SHA-1, SHA-256, and SHA-512 code using the Octeon crypto co-processor is enabled in both builds.
This code is untestable without the hardware. However, based on the code itself, it is implausible that it computes hash values correctly in little-endian builds. Such builds write many incorrect values to COP2:
- SHA-1 and SHA-256: The 64-bit integer that contains the last two 32-bit message words of each block is written to COP2 entirely byte-reflected, due to missing endianness conversion in octeon_sha1_start() and octeon_sha256_start() to compensate for using native 64-bit loads from the message bytes. This differs from all the earlier message words which are written correctly.
Furthermore, the state is written to COP2 with each 32-bit word byte-reflected within each 64-bit integer, due to incorrect use of 64-bit endianness conversion in write_octeon_64bit_hash_dword() when the state is kept in memory in native-endian 32-bit words.
- SHA-512: All the 64-bit message words are written to COP2 byte-reflected, due to missing endianness conversion in write_octeon_64bit_block_sha512() and octeon_sha512_start(). The SHA-512 state words seem to be written correctly.
Big-endian kernels aren't affected by these bugs. These bugs also aren't new; this code has been broken on little-endian ever since it and Octeon little-endian support were first added in v4.1.
Commit d2a948d2db68 ("MIPS: Octeon: Make octeon-md5 driver endian-agnostic") made the MD5 code work on little-endian kernels by adding 64-bit endianness conversions to the COP2 macros used by MD5 (some of which are shared by SHA-1 and SHA-256, despite those algorithms keeping the state words in native-endian instead of MD5's little-endian, causing some of the strange behavior described above). However, SHA-1, SHA-256, and SHA-512 were never fixed to work on little-endian kernels.
Therefore, disable the Octeon SHA-1, SHA-256, and SHA-512 code in little-endian kernels. This causes the generic code that actually computes hash values correctly to be used instead.
--- lib/crypto/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
lib/crypto/Kconfig +3 -3
@@ -237,7 +237,7 @@ config CRYPTO_LIB_SHA1_ARCH depends on CRYPTO_LIB_SHA1 && !UML default y if ARM default y if ARM64 - default y if MIPS && CPU_CAVIUM_OCTEON + default y if MIPS && CPU_CAVIUM_OCTEON && CPU_BIG_ENDIAN default y if PPC default y if S390 default y if SPARC64
@@ -255,7 +255,7 @@ config CRYPTO_LIB_SHA256_ARCH depends on CRYPTO_LIB_SHA256 && !UML default y if ARM && !CPU_V7M default y if ARM64 - default y if MIPS && CPU_CAVIUM_OCTEON + default y if MIPS && CPU_CAVIUM_OCTEON && CPU_BIG_ENDIAN default y if PPC && SPE default y if RISCV && 64BIT && TOOLCHAIN_HAS_VECTOR_CRYPTO && \ RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS
@@ -275,7 +275,7 @@ config CRYPTO_LIB_SHA512_ARCH depends on CRYPTO_LIB_SHA512 && !UML default y if ARM && !CPU_V7M default y if ARM64 - default y if MIPS && CPU_CAVIUM_OCTEON + default y if MIPS && CPU_CAVIUM_OCTEON && CPU_BIG_ENDIAN default y if RISCV && 64BIT && TOOLCHAIN_HAS_VECTOR_CRYPTO && \ RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS default y if S390
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2.53.0