xen/riscv: skip disabled CPU nodes when probing ISA extensions
PATCH v2 1/2 xen/riscv: skip disabled CPU nodes when probing ISA extensions
riscv_fill_hwcap_from_isa_string() intersects the riscv,isa of every CPU node under /cpus, including the ones with status = "disabled". Such a hart is never used by Xen, yet it can still remove extensions from the host ISA: e.g. a disabled hart without the H extension makes Xen panic with "Xen requires extension: h", even though every hart Xen runs on implements it.
Skip CPU nodes which aren't available, both there and in has_isa_extensions_property(), so that the two agree on which harts are taken into account.
---
Changes in v2:
- Skip the disabled CPU nodes in has_isa_extensions_property() as well.
- Remove the comment, as the explanation in the commit description is sufficient and avoids duplicating the same comment in has_isa_extensions_property().
- Update the last paragraph of the commit message: add info about has_isa_extensions_property().
---
--- xen/arch/riscv/cpufeature.c | 6 ++++++ 1 file changed, 6 insertions(+)
xen/arch/riscv/cpufeature.c +6 -0
@@ -477,6 +477,9 @@ static void __init riscv_fill_hwcap_from_isa_string(void)if ( !dt_device_type_is_equal (cpu,"cpu" ) )continue ; +if ( !dt_device_is_available (cpu) ) +continue ; +if (dt_get_cpuid_from_node (cpu, &cpuid) <0 )continue ;
@@ -519,6 +522,9 @@ static bool __init has_isa_extensions_property(void)if ( !dt_device_type_is_equal (cpu,"cpu" ) )continue ; +if ( !dt_device_is_available (cpu) ) +continue ; +if (dt_property_read_string (cpu,"riscv,isa-extensions" , &isa) )continue ;
Signature · 1 line
2.56.0
PATCH v2 2/2 xen/riscv: fix the base ISA checks in riscv_isa_parse_string()
riscv_isa_parse_string() is meant to reject a riscv,isa string which doesn't start with "rv32" or "rv64" (depending on Xen's bitness), but the checks are written with && instead of ||, so a string is rejected only when both characters of a pair are wrong. As a result, e.g. "xv64i" or "rv62i" is accepted on RV64. Also, for a string as short as "rv", isa[3] is read past the terminating NUL.
Use || so that each character is checked.
---
Changes in v2:
- Add A-by and R-by.
---
--- xen/arch/riscv/cpufeature.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
xen/arch/riscv/cpufeature.c +3 -3
@@ -261,14 +261,14 @@ static void __init match_isa_ext(const char *name, const char *name_end,static int __init riscv_isa_parse_string (const char *isa,unsigned long *out_bitmap) { -if ( (isa[0 ] !='r' ) && (isa[1 ] !='v' ) ) +if ( (isa[0 ] !='r' ) || (isa[1 ] !='v' ) )return -EINVAL ;#if defined(CONFIG_RISCV_32 ) -if ( isa[2 ] !='3' && isa[3 ] !='2' ) +if ( (isa[2 ] !='3' ) || (isa[3 ] !='2' ) )return -EINVAL ;#elif defined(CONFIG_RISCV_64 ) -if ( isa[2 ] !='6' && isa[3 ] !='4' ) +if ( (isa[2 ] !='6' ) || (isa[3 ] !='4' ) )return -EINVAL ;#else # error "unsupported RISC-V bitness"
Signature · 1 line
2.56.0
Quoted 7 lines · Oleksii Kurochko
riscv_fill_hwcap_from_isa_string()intersects the riscv,isa of every CPU node under /cpus, including the ones with status = "disabled". Such a hart is never used by Xen, yet it can still remove extensions from the host ISA: e.g. a disabled hart without the H extension makes Xen panic with "Xen requires extension: h", even though every hart Xen runs on implements it.
Quoted 6 lines
Skip CPU nodes which aren't available, both there and in
has_isa_extensions_property(), so that the two agree on which harts are taken into account.Fixes f74ebf58b518 ("xen/riscv: identify specific ISA supported by cpu")Signed-off-by Oleksii Kurochko <[email protected]>
Quoted 8 lines · Oleksii Kurochko
riscv_fill_hwcap_from_isa_string()intersects the riscv,isa of every CPU node under /cpus, including the ones with status = "disabled". Such a hart is never used by Xen, yet it can still remove extensions from the host ISA: e.g. a disabled hart without the H extension makes Xen panic with "Xen requires extension: h", even though every hart Xen runs on implements it.[...]
Signature · 1 line
Baptiste Le Duc <[email protected]>