configs/socfpga_agilex5_vendor: new defconfig
commit: https://gitlab.com/buildroot.org/buildroot/-/commit/7c1fdc76b84a59f88a0b2b90c823bf7695f16b13
branch: https://gitlab.com/buildroot.org/buildroot/-/tree/master
Build Linux, U-Boot, and TF-A for the Agilex 5 SoC Development Kit from the QPDS 26.1.1 GSRD sources.
Signed-off-by Dinh Nguyen <[email protected]>
[Julien:
- squash patch enabling hashes
- rename defconfig to replace "altera" by "vendor" and update readme.txt
- remove tag name in readme.txt for easier future maintenance
- move link in readme.txt at the end
- add DEVELOPERS entry for defconfig
]
Signed-off-by Julien Olivain <[email protected]>
--- DEVELOPERS | 4 ++ board/altera/agilex5/genimage.cfg | 27 +++++++++ board/altera/agilex5/linux.fragment | 4 ++ .../arm-trusted-firmware/arm-trusted-firmware.hash | 2 + board/altera/agilex5/patches/linux/linux.hash | 2 + board/altera/agilex5/patches/uboot/uboot.hash | 2 + board/altera/agilex5/readme.txt | 64 ++++++++++++++++++++++ board/altera/agilex5/uboot.fragment | 4 ++ configs/socfpga_agilex5_vendor_defconfig | 48 ++++++++++++++++ 9 files changed, 157 insertions(+)
DEVELOPERS +4 -0
@@ -904,6 +904,10 @@ N: Dimitrios Siganos <[email protected]> F: package/bvi/ F: package/wireless-regdb/ +N: Dinh Nguyen <[email protected]> +F: board/altera/ +F: configs/socfpga_agilex5_vendor_defconfig + N: Dmitry Chestnykh <[email protected]> F: board/qemu/sparc-ss10/ F: configs/qemu_sparc_ss10_defconfig
board/altera/agilex5/genimage.cfg new file +27 -0
@@ -0,0 +1,27 @@ +image boot.vfat { + vfat { + files = { + "Image", + "socfpga_agilex5_socdk.dtb", + "u-boot.itb" + } + } + + size = 64M +} + +image sdcard.img { + hdimage { + } + + partition boot { + partition-type = 0xc + bootable = "true" + image = "boot.vfat" + } + + partition rootfs { + partition-type = 0x83 + image = "rootfs.ext2" + } +}
board/altera/agilex5/linux.fragment new file +4 -0
@@ -0,0 +1,4 @@ +# QSPI access fails when 4K sectors are enabled (ES-14728). +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +# Marvell PHY on the SoC Development Kit Ethernet ports. +CONFIG_MARVELL_PHY=y
board/altera/agilex5/patches/arm-trusted-firmware/arm-trusted-firmware.hash new file +2 -0
@@ -0,0 +1,2 @@ +# Locally calculated +sha256 59bed1328131f1eb1ee10f16c94d8f0bbf5600d7573d42d0cf987b8edffe2f6a arm-trusted-firmware-QPDS26.1.1_REL_GSRD_PR-git4.tar.gz
board/altera/agilex5/patches/linux/linux.hash new file +2 -0
@@ -0,0 +1,2 @@ +# Locally calculated +sha256 d8328683db0a6b43a96c18d7149b98a11138909ea50f2fa411339f93eb492571 linux-QPDS26.1.1_REL_GSRD_PR-git4.tar.gz
board/altera/agilex5/patches/uboot/uboot.hash new file +2 -0
@@ -0,0 +1,2 @@ +# Locally calculated +sha256 a78bf187fde344297bea7d986f05996dfba94ea11d2d4dc706a78bcae543e175 uboot-QPDS26.1.1_REL_GSRD_PR-git4.tar.gz
board/altera/agilex5/readme.txt new file +64 -0
64 lines not on this page · raw message
board/altera/agilex5/uboot.fragment new file +4 -0
@@ -0,0 +1,4 @@ +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="if fatload mmc 0:1 ${loadaddr} ghrd.core.rbf; then fpga load 0 ${loadaddr} ${filesize}; bridge enable; fi; mmc rescan; fatload mmc 0:1 82000000 Image; fatload mmc 0:1 86000000 socfpga_agilex5_socdk.dtb; setenv bootargs console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait; booti 0x82000000 - 0x86000000"
configs/socfpga_agilex5_vendor_defconfig new file +48 -0
48 lines not on this page · raw message
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