Problem with PCI Express connecting 2 MPC8544
I am trying to activate a PCIe link between two MPC8544 processor's on a custom board.
One processor is configured as Root Complex(cfg_host_agt[0:2] = '111') and the other processor as endpoint (cfg_host_agt[0:2] = '101').
Only PCIe1 is active in both processors (cfg_IO_ports[0:2] = '010')
In u-boot I set the following flags in both processors:
#define CONFIG_PCI
#undef CONFIG_PCI1
#define CONFIG_PCIE1
#undef CONFIG_PCIE2
#undef CONFIG_PCIE3
#define CONFIG_FSL_PCI_INIT
#define CONFIG_FSL_PCIE_RESET
In the first processor (configured as RC) I get the following output(u-boot 1.3.0-rc3):
"
pci_init_board: devdisr=7000008, io_sel=2, host_agent=7
PCIE1 connected to Slot2 as Root Complex (base address e000a000)
...PCIE LTSSM=0x16, Negotiated link width=1
Scanning PCI bus 01
PCIE1 on bus 00 - 01
...
"
the link is well negotiated but if i do "pci" in u-boot console it only shows one device:
"
=> pci
Scanning PCI devices on bus 0
BusDevFun VendorId DeviceId Device Class Sub-Class
_____________________________________________________________
00.00.00 0x1957 0x0033 Processor 0x20
"
In the second processor (configured as EP) I get the following output:
"
...
pci_init_board: devdisr=7000008, io_sel=2, host_agent=5
PCIE1 connected to Slot2 as End Point (base address e000a000)
Scanning PCI bus 00
PCI Scan: Found Bus 0, Device 1, Function 0
00 01 1957 0033 0b20 00
...
"
Here i am using an old version of u-boot (1.3.0-rc3). It seems more
straightforward to work. I've considered updating to the latest u-boot but since we had serious problems with DDR configuration and this has changed considerably since the version I am using I am a little reluctant into an update.
Someone give me a clue?
thanks a lot.
Daniel
Signature · 2 lines
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From: sardamaxima
Quoted 2 lines
In the first processor (configured as RC) I get the following
...
Quoted 1 line
...PCIE LTSSM=0x16, Negotiated link width=1
Good.
Quoted 2 lines
Scanning PCI bus 01
PCIE1 on bus 00 - 01
...
Quoted 6 lines
In the second processor (configured as EP) I get the
following output:
"
...
pci_init_board: devdisr=7000008, io_sel=2, host_agent=5
Quoted 7 lines
PCIE1 connected to Slot2 as End Point (base address
e000a000)
Scanning PCI bus 00
PCI Scan: Found Bus 0, Device 1, Function 000 01 1957 0033 0b20 00...
"
Here i am using an old version of u-boot (1.3.0-rc3).
Since this is an old u-boot, it might not be setting CFG_READY. If this is not set, the end point won't be seen.
Check PEX_CFG_READY with: "pci d 0.0 4b0 1"
-Ed
Quoted 36 lines
From: SWARTHOU at freescale.com
To: fhpworks at hotmail.com
CC: u-boot at lists.denx.de
Subject: RE: [U-Boot] Problem with PCI Express connecting 2 MPC8544
Date: Mon, 25 Jul 2011 22:49:18 +0000From: sardamaxima
Quoted 2 lines
In the first processor (configured as RC) I get the following
...
Quoted 1 line
...PCIE LTSSM=0x16, Negotiated link width=1
Good.
Quoted 2 lines
Scanning PCI bus 01
PCIE1 on bus 00 - 01...
Quoted 6 lines
In the second processor (configured as EP) I get the
following output:
"
...
pci_init_board: devdisr=7000008, io_sel=2, host_agent=5Quoted 7 lines
PCIE1 connected to Slot2 as End Point (base address
e000a000)
Scanning PCI bus 00
PCI Scan: Found Bus 0, Device 1, Function 000 01 1957 0033 0b20 00...
"
Here i am using an old version of u-boot (1.3.0-rc3).
Quoted 6 lines
Since this is an old u-boot, it might not be setting
CFG_READY. If this is not set, the end point won't be seen.Check
PEX_CFG_READYwith: "pci d 0.0 4b0 1"-Ed
Hi Ed
Thanks a lot for the advice. That register had the "ready bit" =0. It is working now and i see the device in /proc/bus/pci/...(@kernel)
Thanks for the help
Hugo