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AMD756 PCI IRQ Routing Patch 0.2.0

PATCH Jhon H. Caicedo O. 2 participants 3 messages Jun 22, 2001

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Jhon H. Caicedo O.

author
#0 lore raw

Hi,

This is an updated version of the patch for AMD756 PCI IRQ Routing, the changes are to use the read/write_config_nybble functions, this makes the code shorter.

Thanks,

--
Jhon H. Caicedo O. <[email protected]>
Observatorio Sismológico del SurOccidente O.S.S.O
http://www.osso.org.co
Cali - Colombia

arch/i386/kernel/pci-irq.c +34 -0
@@ -391,6 +391,38 @@
 	return 1;
 }
 
+/* Support for AMD756 PCI IRQ Routing
+ * Jhon H. Caicedo <[email protected]>
+ * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
+ * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
+ * The AMD756 pirq rules are nibble-based
+ * offset 0x56 0-3 PIRQA  4-7  PIRQB
+ * offset 0x57 0-3 PIRQC  4-7  PIRQD
+ */
+static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
+{
+	u8 irq;
+	irq = 0;
+	if (pirq <= 4)
+	{
+		irq = read_config_nybble(router, 0x56, pirq - 1);
+	}
+	printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
+		dev->vendor, dev->device, pirq, irq);
+	return irq;
+}
+
+static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
+{
+	printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n", 
+		dev->vendor, dev->device, pirq, irq);
+	if (pirq <= 4)
+	{
+		write_config_nybble(router, 0x56, pirq - 1, irq);
+	}
+	return 1;
+}
+
 #ifdef CONFIG_PCI_BIOS
 
 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)

@@ -426,6 +458,8 @@
 	{ "VLSI 82C534", PCI_VENDOR_ID_VLSI, PCI_DEVICE_ID_VLSI_82C534, pirq_vlsi_get, pirq_vlsi_set },
 	{ "ServerWorks", PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4,
 	  pirq_serverworks_get, pirq_serverworks_set },
+	{ "AMD756 VIPER", PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B,
+		pirq_amd756_get, pirq_amd756_set },
 
 	{ "default", 0, 0, NULL, NULL }
 };
#1 lore raw
Quoted 3 lines · Jhon H. Caicedo O.

This is an updated version of the patch for AMD756 PCI IRQ Routing, the changes are to use the read/write_config_nybble functions, this makes the code shorter.

Looks much better, thanks!

Quoted 2 lines
(quoted diff) +2 -0
+       printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
+               dev->vendor, dev->device, pirq, irq);

[...]

arch/i386/kernel/pci-irq.c line 418

Quoted 2 lines
arch/i386/kernel/pci-irq.c +2 -0
+       printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
+               dev->vendor, dev->device, pirq, irq);

None of the other PCI IRQ routines print out IRQ routing messages, so these shouldn't either. I assume this is debugging code?

Further, the printks are potentially misleading, because pirq_amd756_get might not receive a valid irq, if 'pirq' is greater than 4.

Jeff

Signature · 3 lines
Jeff Garzik      | Andre the Giant has a posse.
Building 1024    |
MandrakeSoft     |
author
#2 lore raw
In reply to Jhon H. Caicedo O.

Hi,

Quoted 2 lines · Jeff Garzik

None of the other PCI IRQ routines print out IRQ routing messages, so these shouldn't either. I assume this is debugging code?

Yes, the printks are only for debug and surely will be removed after some tests of the patch.

Quoted 3 lines

Further, the printks are potentially misleading, because pirq_amd756_get might not receive a valid irq, if 'pirq' is greater than 4.

With pirq > 4 pirq_amd756_get should return 0, i left the printk just to see if this happens in some test.

In the original 2.4.5 kernel (without patch), I get irq=0 for pirq=4 and that was the cause of the error with a SMC Lucent CardBus Bridge.

Thanks,
--
Jhon H. Caicedo O. <[email protected]>
Observatorio Sismológico del SurOccidente O.S.S.O
http://www.osso.org.co
Cali - Colombia