EJTAG patch

PATCH Carsten Langgaard 1 participant 1 message Jan 17, 2002 MIPS

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Carsten Langgaard

author

2002-01-17 15:19 UTC #0 lore raw

I have attached a patch for EJTAG exception support on MIPS32 CPUs. I send these patches to everyone and not just Ralf, because I've got questions from various people about MIPS32 CPUs and Malta board support in the 2.4.17 kernel.
Sorry to disturb the rest of you.

/Carsten

_    _ ____  ___   Carsten Langgaard   Mailto:[email protected]
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
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  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
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Index: arch/mips/kernel/setup.c
===================================================================
RCS file: /cvs/linux/arch/mips/kernel/setup.c,v
retrieving revision 1.96.2.4

mips/kernel/setup.c +6 -2

diff -u -r1.96.2.4 setup.c
@@ -150,6 +150,10 @@
 	case CPU_NEVADA:
 	case CPU_RM7000:
 	case CPU_TX49XX:
+	case CPU_4KC:
+	case CPU_4KEC:
+	case CPU_4KSC:
+	case CPU_5KC:
 		cpu_wait = r4k_wait;
 		printk(" available.\n");
 		break;

@@ -435,7 +439,7 @@
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 
 				           MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | 
 				           MIPS_CPU_DIVEC | MIPS_CPU_WATCH |
-			                   MIPS_CPU_MCHECK;
+			                   MIPS_CPU_MCHECK | MIPS_CPU_EJTAG;
 			config1 = read_mips32_cp0_config1();
 			if (config1 & (1 << 3))
 				mips_cpu.options |= MIPS_CPU_WATCH;

@@ -452,7 +456,7 @@
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 
 				           MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | 
 				           MIPS_CPU_DIVEC | MIPS_CPU_WATCH |
-			                   MIPS_CPU_MCHECK;
+			                   MIPS_CPU_MCHECK | MIPS_CPU_EJTAG;
 			config1 = read_mips32_cp0_config1();
 			if (config1 & (1 << 3))
 				mips_cpu.options |= MIPS_CPU_WATCH;

Index: arch/mips/kernel/traps.c
===================================================================
RCS file: /cvs/linux/arch/mips/kernel/traps.c,v
retrieving revision 1.99.2.3

mips/kernel/traps.c +1 -1

diff -u -r1.99.2.3 traps.c
@@ -853,7 +853,7 @@
 	 * destination.
 	 */
 	if (mips_cpu.options & MIPS_CPU_EJTAG)
-		memcpy((void *)(KSEG0 + 0x200), &except_vec_ejtag_debug, 0x80);
+		memcpy((void *)(KSEG0 + 0x300), &except_vec_ejtag_debug, 0x80);
 
 	/*
 	 * Only some CPUs have the watch exceptions or a dedicated