config option for irq_balance()
PATCH 1/1 config option for irq_balance()
IRQ Balancing doesn't work on some hardware platforms or systems with > 8 CPUs.
Some benchmarks have also showed that the irq_balancing code is actually a
performance hit in many cases. For these reasons, I've created a config option to turn of IRQ Balancing if desired. Attatched is the patch...
Cheers!
-Matt
arch/i386/Config.help +6 -0
@@ -41,6 +41,12 @@ 486, 586, Pentiums, and various instruction-set-compatible chips by AMD, Cyrix, and others. +CONFIG_IRQ_BALANCE + This option is used to turn IRQ Balancing on machines with multiple + APIC's (ie: SMP, NUMA, etc) on or off. This behavior has been seen + under some conditions to reduce performance, and on some platorms causes + interesting hangs, particularly those with more than 8 CPUs. + CONFIG_MULTIQUAD This option is used for getting Linux to run on a (IBM/Sequent) NUMA multiquad box. This changes the way that processors are bootstrapped,
arch/i386/config.in +11 -0
@@ -164,8 +164,19 @@ if [ "$CONFIG_X86_UP_IOAPIC" = "y" ]; then define_bool CONFIG_X86_IO_APIC y fi + define_bool CONFIG_IRQBALANCE n else bool 'Multiquad NUMA system' CONFIG_MULTIQUAD + if [ "$CONFIG_MULTIQUAD" = "y" ]; then + define_bool CONFIG_IRQBALANCE_DISABLE y + else + bool 'Turn Off IRQ Balancing' CONFIG_IRQBALANCE_DISABLE + fi + if [ "$CONFIG_IRQBALANCE_DISABLE" = "y" ]; then + define_bool CONFIG_IRQBALANCE n + else + define_bool CONFIG_IRQBALANCE y + fi fi bool 'Machine Check Exception' CONFIG_X86_MCE
arch/i386/kernel/io_apic.c +3 -6
@@ -199,7 +199,7 @@spin_unlock_irqrestore (&ioapic_lock, flags); } -#if CONFIG_SMP +#if CONFIG_IRQBALANCE typedef struct { unsigned int cpu;
@@ -211,15 +211,12 @@extern unsigned long irq_affinity [NR_IRQS ]; -#endif -#define IDLE_ENOUGH (cpu,now) \ (idle_cpu(cpu) && ((now) - irq_stat[(cpu)].idle_timestamp > 1))#define IRQ_ALLOWED (cpu,allowed_mask) \ ((1 << cpu) & (allowed_mask)) -#if CONFIG_SMP static unsigned long move (int curr_cpu,unsigned long allowed_mask,unsigned long now,int direction) {int search_idle =1 ;
@@ -264,9 +261,9 @@ set_ioapic_affinity(irq, 1 << entry->cpu); } } -#else /* !SMP */ +#else /* !CONFIG_IRQBALANCE */ static inline void balance_irq (int irq) { } -#endif +#endif /* CONFIG_IRQBALANCE */ /* * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to