MIPS16 patch in unaligned.c

PATCH Carsten Langgaard 1 participant 1 message Dec 4, 2002 MIPS

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Carsten Langgaard

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2002-12-04 12:53 UTC #0 lore raw

The attached patch make sure we don't try to emulate load and stores, when running in MIPS16 mode on CPUs, which support MIPS16. Without this patch the kernel crashes, if running something nasty like crashme on a CPU, which support MIPS16.

/Carsten

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Index: arch/mips/kernel/unaligned.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/kernel/unaligned.c,v retrieving revision 1.15.2.7

mips/kernel/unaligned.c +3 -3

diff -u -r1.15.2.7 unaligned.c
@@ -494,10 +494,10 @@
 
 	/*
 	 * Did we catch a fault trying to load an instruction?
-	 * This also catches attempts to activate MIPS16 code on
-	 * CPUs which don't support it.
+	 * Or are we running in MIPS16 mode?
 	 */
-	if (regs->cp0_badvaddr == regs->cp0_epc)
+	if ((regs->cp0_badvaddr == regs->cp0_epc) ||
+	    (regs->cp0_epc & 0x1))
 		goto sigbus;
 
 	pc = regs->cp0_epc + ((regs->cp0_cause & CAUSEF_BD) ? 4 : 0);

Index: arch/mips64/kernel/unaligned.c
===================================================================
RCS file: /home/cvs/linux/arch/mips64/kernel/unaligned.c,v retrieving revision 1.6.2.6

mips64/kernel/unaligned.c +3 -3

diff -u -r1.6.2.6 unaligned.c
@@ -494,10 +494,10 @@
 
 	/*
 	 * Did we catch a fault trying to load an instruction?
-	 * This also catches attempts to activate MIPS16 code on
-	 * CPUs which don't support it.
+	 * Or are we running in MIPS16 mode?
 	 */
-	if (regs->cp0_badvaddr == regs->cp0_epc)
+	if ((regs->cp0_badvaddr == regs->cp0_epc) ||
+	    (regs->cp0_epc & 0x1))
 		goto sigbus;
 
 	pc = regs->cp0_epc + ((regs->cp0_cause & CAUSEF_BD) ? 4 : 0);