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generic device DMA implementation

RFC Manfred Spraul 2 participants 2 messages Dec 5, 2002 – Dec 6, 2002

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#0 lore raw
Quoted 7 lines

Hmm... that doesn't seem sufficient to explain it.

Some background: I work with PPC embedded chips (the 4xx family) whose only way to get consistent memory is by entirely disabling the cache.

What do you mean with "disable"?
Do you have to disable the cache entirely when you encounter the first pci_alloc_consistent() call, or do you disable the cache just for the region that is returned by pci_alloc_consistent()?

If you disable it entirely - would "before_acess_consistent_area() / after_access_consistent_area()" macros help to avoid that, or are there other problems?

--
Manfred

#1 lore raw
Quoted 11 lines · Manfred Spraul
Quoted 6 lines

Hmm... that doesn't seem sufficient to explain it.

Some background: I work with PPC embedded chips (the 4xx family) whose only way to get consistent memory is by entirely disabling the cache.

What do you mean with "disable"?
Do you have to disable the cache entirely when you encounter the first pci_alloc_consistent() call, or do you disable the cache just for the region that is returned by pci_alloc_consistent()?

Just for the region - it is an attribute in the PTE.

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David Gibson			| For every complex problem there is a
[email protected]	| solution which is simple, neat and
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