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cs46xx, SPDIF output fixes, AC3 through IEC958 should work OK

PATCH Applied Benny Sjostrand 3 participants 5 messages Mar 3, 2003 – Mar 5, 2003

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Benny Sjostrand

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#0 lore raw

PATCH 1/1 cs46xx, SPDIF output fixes, AC3 through IEC958 should work OK

Hi!

With this patch AC3 through IEC958 should work OK, and synchronizations problems with the SPDIF output should be gone. (about SPDIF input the status is still the same)

I've tested it with ogle 0.9, the AC3 stuff seems to work well, have not tested with xine (yet).

This patch adds a new DSP firmware routine, that makes it's possible to DMA from host directly to the SPDIF output. This will affect all playback on IEC958 device on 48khz, other rates will (should) work exactly as before.

- Added the cwcdma DSP firmware module
- Fixed a minor bug in cs46xx_iec958_pre_open(...)
- in cs46xx_dsp_enable_spdif_hw(...), disable SPDIF hw
before enabling, this seems to help solving the synchronization issue
- Some changes in cs46xx_dsp_create_pcm_channel(...) and cs46xx_dsp_create_src_task_scb(...) to adapt to the new DSP firmware.

Well, with the new firmware module I would consider this patch a little bit experimental ;)

/Benny

cvs/alsa-kernel/pci/cs46xx/cs46xx_lib.c renamed from pci/cs46xx/cs46xx_lib.c +6 -0
diff --exclude=CVS --exclude=Makefile -Naur alsa-kernel/pci/cs46xx/cs46xx_lib.c ../cvs/alsa-kernel/pci/cs46xx/cs46xx_lib.c
@@ -321,6 +321,7 @@
 #include "imgs/cwcasync.h"
 #include "imgs/cwcsnoop.h"
 #include "imgs/cwcbinhack.h"
+#include "imgs/cwcdma.h"
 
 int snd_cs46xx_clear_BA1(cs46xx_t *chip,
                          unsigned long offset,

@@ -3165,6 +3166,11 @@
 
 	if (cs46xx_dsp_load_module(chip, &cwcbinhack_module) < 0) {
 		snd_printk(KERN_ERR "image download error [cwcbinhack]\n");
+		return -EIO;
+	}
+
+	if (cs46xx_dsp_load_module(chip, &cwcdma_module) < 0) {
+		snd_printk(KERN_ERR "image download error [cwcdma]\n");
 		return -EIO;
 	}
cvs/alsa-kernel/pci/cs46xx/cs46xx_lib.h renamed from pci/cs46xx/cs46xx_lib.h +2 -1
diff --exclude=CVS --exclude=Makefile -Naur alsa-kernel/pci/cs46xx/cs46xx_lib.h ../cvs/alsa-kernel/pci/cs46xx/cs46xx_lib.h
@@ -156,7 +156,8 @@
                                                        u16 src_buffer_addr,
                                                        u16 src_delay_buffer_addr,u32 dest,
                                                        dsp_scb_descriptor_t * parent_scb,
-                                                       int scb_child_type);
+                                                       int scb_child_type,
+						       int pass_through);
 dsp_scb_descriptor_t *  cs46xx_dsp_create_mix_only_scb(cs46xx_t * chip,char * scb_name,
                                                        u16 mix_buffer_addr,u32 dest,
                                                        dsp_scb_descriptor_t * parent_scb,
cvs/alsa-kernel/pci/cs46xx/dsp_spos.c renamed from pci/cs46xx/dsp_spos.c +25 -2
diff --exclude=CVS --exclude=Makefile -Naur alsa-kernel/pci/cs46xx/dsp_spos.c ../cvs/alsa-kernel/pci/cs46xx/dsp_spos.c
@@ -1371,11 +1371,11 @@
 
 	/* SPDIF input sampel rate converter */
 	src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
-						      48000,
+						      ins->spdif_in_sample_rate,
 						      SRC_OUTPUT_BUF1,
 						      SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
 						      master_mix_scb,
-						      SCB_ON_PARENT_SUBLIST_SCB);
+						      SCB_ON_PARENT_SUBLIST_SCB,0);
 
 	if (!src_task_scb) goto _fail_end;
 

@@ -1564,9 +1564,32 @@
 	return 0;
 }
 
+
+static void cs46xx_dsp_disable_spdif_hw (cs46xx_t *chip)
+{
+	dsp_spos_instance_t * ins = chip->dsp_spos_instance;
+
+	/* set SPDIF output FIFO slot */
+	snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
+
+	/* SPDIF output MASTER ENABLE */
+	cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
+
+	/* right and left validate bit */
+	/*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
+	cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
+
+	/* monitor state */
+	ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
+}
+
 int cs46xx_dsp_enable_spdif_hw (cs46xx_t *chip)
 {
 	dsp_spos_instance_t * ins = chip->dsp_spos_instance;
+
+	/* if hw-ctrl already enabled, turn off to reset logic ... */
+	cs46xx_dsp_disable_spdif_hw (chip);
+	udelay(50);
 
 	/* set SPDIF output FIFO slot */
 	snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
cvs/alsa-kernel/pci/cs46xx/dsp_spos_scb_lib.c renamed from pci/cs46xx/dsp_spos_scb_lib.c +36 -37

137 lines not on this page · raw message

cvs/alsa-kernel/pci/cs46xx/imgs/cwcdma.asp renamed from pci/cs46xx/imgs/cwcdma.asp +169 -0

169 lines not on this page · raw message

cvs/alsa-kernel/pci/cs46xx/imgs/cwcdma.h renamed from pci/cs46xx/imgs/cwcdma.h +68 -0

68 lines not on this page · raw message

Applied
#1 lore raw

At Mon, 03 Mar 2003 02:25:03 +0100,

Quoted 23 lines · Benny Sjostrand

[1 <text/plain; us-ascii (7bit)>]
Hi!

With this patch AC3 through IEC958 should work OK, and synchronizations problems with the SPDIF output should be gone. (about SPDIF input the status is still the same)

I've tested it with ogle 0.9, the AC3 stuff seems to work well, have not tested with xine (yet).

This patch adds a new DSP firmware routine, that makes it's possible to DMA from host directly to the SPDIF output. This will affect all playback on IEC958 device on 48khz, other rates will (should) work exactly as before.

- Added the cwcdma DSP firmware module
- Fixed a minor bug in cs46xx_iec958_pre_open(...)
- in cs46xx_dsp_enable_spdif_hw(...), disable SPDIF hw before enabling, this seems to help solving the synchronization issue
- Some changes in cs46xx_dsp_create_pcm_channel(...) and cs46xx_dsp_create_src_task_scb(...) to adapt to the new DSP firmware.

Quoted 2 lines

Well, with the new firmware module I would consider this patch a little bit experimental ;)

thanks, applied to cvs.
it's working fine on my DMX x-fire 1024.

Takashi

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author
#2 lore raw
Quoted 2 lines

thanks, applied to cvs.
it's working fine on my DMX x-fire 1024.

Sound great! only one little thing, I've noticed that the imgs/cwcdma.h is not in CVS.
Optionally if you like to include the DSP source imgs/cwcdma.asp with the driver, but not needed to compile the driver.

/Benny

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#3 lore raw

At Mon, 3 Mar 2003 15:08:26 +0100 (CET),

Quoted 8 lines · Benny Sjostrand
Quoted 3 lines

thanks, applied to cvs.
it's working fine on my DMX x-fire 1024.

Sound great! only one little thing, I've noticed that the imgs/cwcdma.h is not in CVS.
Optionally if you like to include the DSP source imgs/cwcdma.asp with the driver, but not needed to compile the driver.

sorry, committed now.

Takashi

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#4 lore raw
In reply to Takashi Iwai

Am Montag, 3. März 2003 12:33 schrieb Takashi Iwai:

Quoted 10 lines

At Mon, 03 Mar 2003 02:25:03 +0100,

Quoted 7 lines · Benny Sjostrand

- Added the cwcdma DSP firmware module
- Fixed a minor bug in cs46xx_iec958_pre_open(...)
- in cs46xx_dsp_enable_spdif_hw(...), disable SPDIF hw before enabling, this seems to help solving the synchronization issue
- Some changes in cs46xx_dsp_create_pcm_channel(...) and cs46xx_dsp_create_src_task_scb(...) to adapt to the new DSP firmware.

Quoted 5 lines
Quoted 2 lines

Well, with the new firmware module I would consider this patch a little bit experimental ;)

thanks, applied to cvs.
it's working fine on my DMX x-fire 1024.

Confirmed. It works with my Hercules GameTheater XP7.1 I tried it with xine and option "a52 passthrough". Nice work.

Chris

PS: The only small issue is when pausing the playback. After resuming I hear scratching noises (the typical ugly SPDIF-out-of-sync noises). The good news is that the digital out is automatically resynced shortly after (about 200ms).

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