IP32 memory patch

Hi all,

Here is patch to allow IP32 to access full 1G of memory. I was able to boot an O2 with 576M of ram using NFS-root.

Two notes:
1. This patch will only work with latest linux-mips.org CVS tree
2. Seems that PCI support is messed up by this patch, so SCSI doesn't work.

If someone can see something obvious regarding #2, I'll be glad to hear it.

Ilya.

Index: arch/mips/sgi-ip32/Makefile
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/Makefile,v retrieving revision 1.9

diff -u -r1.9 Makefile
@@ -4,6 +4,6 @@

#

obj-y += ip32-berr.o ip32-irq.o ip32-irq-glue.o ip32-setup.o ip32-reset.o \
- crime.o
+ crime.o ip32-memory.o

EXTRA_AFLAGS := $(CFLAGS)
Index: arch/mips/sgi-ip32/crime.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/crime.c,v retrieving revision 1.6

diff -u -r1.6 crime.c
@@ -24,7 +24,8 @@

{
       unsigned int id, rev;
       const int field = 2 * sizeof(unsigned long);
-
+
+       set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
       crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
       mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));

Index: arch/mips/sgi-ip32/ip32-setup.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/ip32-setup.c,v retrieving revision 1.22

diff -u -r1.22 ip32-setup.c
@@ -94,10 +94,6 @@
 

static int __init ip32_setup(void)
{
- set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
-
- crime_init();
-

       board_be_init = ip32_be_init;

       rtc_get_time = mc146818_get_cmos_time;

Index: include/asm-mips/mach-ip32/spaces.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/mach-ip32/spaces.h,v retrieving revision 1.1

diff -u -r1.1 spaces.h
@@ -12,10 +12,6 @@
 

#include <linux/config.h>

-/*
- * This handles the memory map.
- */
-#define PAGE_OFFSET 0xffffffff80000000

/*
* Memory above this physical address will be considered highmem.
@@ -39,4 +35,9 @@

#define TO_CAC(x)              (CAC_BASE   | ((x) & TO_PHYS_MASK))
#define TO_UNCAC(x)            (UNCAC_BASE | ((x) & TO_PHYS_MASK))

+/*
+ * This handles the memory map.
+ */
+#define PAGE_OFFSET CAC_BASE
+
#endif /* __ASM_MACH_IP32_SPACES_H */

@@ -0,0 +1,15 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H
+
+#if defined(CONFIG_CPU_R5000) && defined(CONFIG_MIPS64)
+#define cpu_has_llsc   0
+#endif
+
+#endif /* __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H */

So, I found the problem.
Memory above 256M is mapped at 0x40000000+256M in IP32. However, PCI sees whole 1G as contiguous chunk at offset 0. This means we have to translate dma addreses differently, depending on wether they fall within first 256M or not.

So, I created separate implemetation of pci_dma_* routines.

Index: arch/mips/Kconfig
===================================================================
RCS file: /home/cvs/linux/arch/mips/Kconfig,v
retrieving revision 1.126

diff -u -r1.126 Kconfig
@@ -541,6 +541,8 @@
       select ARC
       select ARC32
       select BOOT_ELF32
+       select OWN_DMA
+       select DMA_IP32
       select DMA_NONCOHERENT
       select HW_HAS_PCI
       select R5000_CPU_SCACHE

@@ -926,6 +928,12 @@

config DMA_IP27
bool

+config DMA_IP32
+ bool
+
+config OWN_DMA
+ bool
+
config DMA_NONCOHERENT
bool
Index: arch/mips/mm/Makefile
===================================================================
RCS file: /home/cvs/linux/arch/mips/mm/Makefile,v
retrieving revision 1.74

diff -u -r1.74 Makefile
@@ -34,8 +34,11 @@

#
# Choose one DMA coherency model
#
+ifndef CONFIG_OWN_DMA
obj-$(CONFIG_DMA_COHERENT) += dma-coherent.o
obj-$(CONFIG_DMA_NONCOHERENT) += dma-noncoherent.o +endif
obj-$(CONFIG_DMA_IP27) += dma-ip27.o
+obj-$(CONFIG_DMA_IP32) += dma-ip32.o

EXTRA_AFLAGS := $(CFLAGS)

Index: arch/mips/sgi-ip32/Makefile
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/Makefile,v retrieving revision 1.9

diff -u -r1.9 Makefile
@@ -4,6 +4,6 @@

#

obj-y += ip32-berr.o ip32-irq.o ip32-irq-glue.o ip32-setup.o ip32-reset.o \
- crime.o
+ crime.o ip32-memory.o

EXTRA_AFLAGS := $(CFLAGS)
Index: arch/mips/sgi-ip32/crime.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/crime.c,v retrieving revision 1.6

diff -u -r1.6 crime.c
@@ -24,7 +24,8 @@

{
       unsigned int id, rev;
       const int field = 2 * sizeof(unsigned long);
-
+
+       set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
       crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
       mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));

Index: include/asm-mips/ip32/crime.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/ip32/crime.h,v retrieving revision 1.6

diff -u -r1.6 crime.h
@@ -156,4 +156,6 @@
 

extern struct sgi_crime *crime;

+#define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */
+
#endif /* __ASM_CRIME_H__ */
Index: include/asm-mips/mach-ip32/spaces.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/mach-ip32/spaces.h,v retrieving revision 1.1

diff -u -r1.1 spaces.h
@@ -12,10 +12,6 @@
 

#include <linux/config.h>

-/*
- * This handles the memory map.
- */
-#define PAGE_OFFSET 0xffffffff80000000

/*
* Memory above this physical address will be considered highmem.
@@ -26,11 +22,7 @@
#define HIGHMEM_START (1UL << 59UL)
#endif

-#ifdef CONFIG_DMA_NONCOHERENT
#define CAC_BASE 0x9800000000000000
-#else
-#define CAC_BASE 0xa800000000000000
-#endif
#define IO_BASE 0x9000000000000000
#define UNCAC_BASE 0x9000000000000000
#define MAP_BASE 0xc000000000000000
@@ -39,4 +31,9 @@

#define TO_CAC(x)              (CAC_BASE   | ((x) & TO_PHYS_MASK))
#define TO_UNCAC(x)            (UNCAC_BASE | ((x) & TO_PHYS_MASK))

+/*
+ * This handles the memory map.
+ */
+#define PAGE_OFFSET CAC_BASE
+
#endif /* __ASM_MACH_IP32_SPACES_H */

@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 Ilya A. Volynets-Evenbakh (Total Knowledge)
+ */
+#ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * R5000 has an interesting "restriction":  ll(d)/sc(d)
+ * instructions to XKPHYS region simply do uncached bus
+ * requests. This breaks all the atomic bitops functions.
+ * so, for 64bit IP32 kernel we just don't use ll/sc.
+ * This does not affect luserland.
+ */
+#if defined(CONFIG_CPU_R5000) && defined(CONFIG_MIPS64)
+#define cpu_has_llsc   0
+#endif
+
+#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */

Index: arch/mips/sgi-ip32/ip32-setup.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/ip32-setup.c,v retrieving revision 1.22

diff -u -r1.22 ip32-setup.c
@@ -94,10 +94,6 @@
 

static int __init ip32_setup(void)
{
- set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
-
- crime_init();
-

       board_be_init = ip32_be_init;

       rtc_get_time = mc146818_get_cmos_time;

Seems my mailer broke the patch, so I'm sending it as attachement.

Index: arch/mips/Kconfig
===================================================================
RCS file: /home/cvs/linux/arch/mips/Kconfig,v
retrieving revision 1.126

diff -u -r1.126 Kconfig
@@ -541,6 +541,8 @@
 	select ARC
 	select ARC32
 	select BOOT_ELF32
+	select OWN_DMA
+	select DMA_IP32
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
 	select R5000_CPU_SCACHE

@@ -926,6 +928,12 @@
 config	DMA_IP27
 	bool
 
+config	DMA_IP32
+	bool
+
+config	OWN_DMA
+	bool
+
 config	DMA_NONCOHERENT
 	bool

Index: arch/mips/mm/Makefile
===================================================================
RCS file: /home/cvs/linux/arch/mips/mm/Makefile,v
retrieving revision 1.74

diff -u -r1.74 Makefile
@@ -34,8 +34,11 @@
 #
 # Choose one DMA coherency model
 #
+ifndef CONFIG_OWN_DMA
 obj-$(CONFIG_DMA_COHERENT)	+= dma-coherent.o
 obj-$(CONFIG_DMA_NONCOHERENT)	+= dma-noncoherent.o
+endif
 obj-$(CONFIG_DMA_IP27)		+= dma-ip27.o
+obj-$(CONFIG_DMA_IP32)		+= dma-ip32.o
 
 EXTRA_AFLAGS := $(CFLAGS)

Index: arch/mips/sgi-ip32/Makefile
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/Makefile,v retrieving revision 1.9

diff -u -r1.9 Makefile
@@ -4,6 +4,6 @@
 #
 
 obj-y	+= ip32-berr.o ip32-irq.o ip32-irq-glue.o ip32-setup.o ip32-reset.o \
-	   crime.o
+	   crime.o ip32-memory.o
 
 EXTRA_AFLAGS := $(CFLAGS)

Index: arch/mips/sgi-ip32/crime.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/crime.c,v retrieving revision 1.6

diff -u -r1.6 crime.c
@@ -24,7 +24,8 @@
 {
 	unsigned int id, rev;
 	const int field = 2 * sizeof(unsigned long);
-	
+
+	set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));	
 	crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
 	mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
 

Index: include/asm-mips/ip32/crime.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/ip32/crime.h,v retrieving revision 1.6

diff -u -r1.6 crime.h
@@ -156,4 +156,6 @@
 
 extern struct sgi_crime *crime;
 
+#define CRIME_HI_MEM_BASE	0x40000000	/* this is where whole 1G of RAM is mapped */
+
 #endif /* __ASM_CRIME_H__ */

Index: include/asm-mips/mach-ip32/spaces.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/mach-ip32/spaces.h,v retrieving revision 1.1

diff -u -r1.1 spaces.h
@@ -12,10 +12,6 @@
 
 #include <linux/config.h>
 
-/*
- * This handles the memory map.
- */
-#define PAGE_OFFSET		0xffffffff80000000
 
 /*
  * Memory above this physical address will be considered highmem.

@@ -26,11 +22,7 @@
 #define HIGHMEM_START		(1UL << 59UL)
 #endif
 
-#ifdef CONFIG_DMA_NONCOHERENT
 #define CAC_BASE		0x9800000000000000
-#else
-#define CAC_BASE		0xa800000000000000
-#endif
 #define IO_BASE			0x9000000000000000
 #define UNCAC_BASE		0x9000000000000000
 #define MAP_BASE		0xc000000000000000

@@ -39,4 +31,9 @@
 #define TO_CAC(x)		(CAC_BASE   | ((x) & TO_PHYS_MASK))
 #define TO_UNCAC(x)		(UNCAC_BASE | ((x) & TO_PHYS_MASK))
 
+/*
+ * This handles the memory map.
+ */
+#define PAGE_OFFSET		CAC_BASE
+
 #endif /* __ASM_MACH_IP32_SPACES_H */

@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 Ilya A. Volynets-Evenbakh
+ */
+#ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * R5000 has an interesting "restriction":  ll(d)/sc(d)
+ * instructions to XKPHYS region simply do uncached bus
+ * requests. This breaks all the atomic bitops functions.
+ * so, for 64bit IP32 kernel we just don't use ll/sc.
+ * This does not affect luserland.
+ */
+#if defined(CONFIG_CPU_R5000) && defined(CONFIG_MIPS64)
+#define cpu_has_llsc	0
+#endif
+
+#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */

Index: arch/mips/sgi-ip32/ip32-setup.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/ip32-setup.c,v retrieving revision 1.22

diff -u -r1.22 ip32-setup.c
@@ -94,10 +94,6 @@
 
 static int __init ip32_setup(void)
 {
-	set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
-
-	crime_init();
-
 	board_be_init = ip32_be_init;
 
 	rtc_get_time = mc146818_get_cmos_time;

@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 Ilya A. Volynets-Evenbakh
+ */
+#ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * R5000 has an interesting "restriction":  ll(d)/sc(d)
+ * instructions to XKPHYS region simply do uncached bus
+ * requests. This breaks all the atomic bitops functions.
+ * so, for 64bit IP32 kernel we just don't use ll/sc.
+ * This does not affect luserland.
+ */
+#if defined(CONFIG_CPU_R5000) && defined(CONFIG_MIPS64)
+#define cpu_has_llsc	0
+#endif
+
+#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */