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ppc32: Fix mv64x60 internal SRAM size

PATCH In review Mark A. Greer 2 participants 3 messages Mar 18, 2005

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Mark A. Greer

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#0 lore raw

PATCH 1/1 ppc32: Fix mv64x60 internal SRAM size

ppc32: Fix wrong size for mv64[34]60's internal SRAM.

- Fix incorrect SRAM size
- Minor Kconfig cleanups for mv64x60 platforms

Please apply.

Signed-off-by Mark A. Greer <[email protected]>

--

arch/ppc/Kconfig +3 -9
diff -Nru a/arch/ppc/Kconfig b/arch/ppc/Kconfig
@@ -570,7 +570,6 @@
 
 config RADSTONE_PPC7D
 	bool "Radstone Technology PPC7D board"
-	select MV64360
 
 config ADIR
 	bool "SBS-Adirondack"

@@ -746,19 +745,14 @@
 	depends on EV64260 || CPCI690
 	default y
 
-config MV64360
+config MV64360 # Really MV64360 & MV64460
 	bool
-	depends on KATANA || RADSTONE_PPC7D
+	depends on CHESTNUT || KATANA || RADSTONE_PPC7D
 	default y
 
-config MV64360
-	bool
-	depends on CHESTNUT
-  	default y
-
 config MV64X60
 	bool
-	depends on (GT64260 || MV64360)
+	depends on GT64260 || MV64360
 	default y
 
 menu "Set bridge options"
arch/ppc/platforms/chestnut.h +2 -2
diff -Nru a/arch/ppc/platforms/chestnut.h b/arch/ppc/platforms/chestnut.h
@@ -28,8 +28,8 @@
  *    0xffd00000-0xffd00004      - CPLD
  *    0xffc00000-0xffc0000f      - UART
  *    0xffb00000-0xffb07fff      - FRAM
- *    0xffa00000-0xffafffff      - *** HOLE ***
- *    0xff800000-0xff9fffff      - MV64460 Integrated SRAM
+ *    0xff840000-0xffafffff      - *** HOLE ***
+ *    0xff800000-0xff83ffff      - MV64460 Integrated SRAM
  *    0xfe000000-0xff8fffff      - *** HOLE ***
  *    0xfc000000-0xfdffffff      - 32bit Flash
  *    0xf1010000-0xfbffffff      - *** HOLE ***
arch/ppc/platforms/katana.h +1 -1
diff -Nru a/arch/ppc/platforms/katana.h b/arch/ppc/platforms/katana.h
@@ -24,7 +24,7 @@
  * on a boundary that is a multiple of the window size):
  *
  *    0xff800000-0xffffffff      - Boot window
- *    0xf8400000-0xf85fffff      - Internal SRAM
+ *    0xf8400000-0xf843ffff      - Internal SRAM
  *    0xf8200000-0xf83fffff      - CPLD
  *    0xf8100000-0xf810ffff      - MV64360 Registers (CONFIG_MV64X60_NEW_BASE)
  *    0xf8000000-0xf80fffff      - Socketed FLASH
include/asm-ppc/mv64x60_defs.h +1 -1
diff -Nru a/include/asm-ppc/mv64x60_defs.h b/include/asm-ppc/mv64x60_defs.h
@@ -347,7 +347,7 @@
 #define	MV64360_SRAM_ERR_DATA_HI		0x03a0
 #define	MV64360_SRAM_ERR_PARITY			0x03a8
 
-#define	MV64360_SRAM_SIZE			0x00200000 /* 2 MB of SRAM */
+#define	MV64360_SRAM_SIZE			0x00040000 /* 2Mb/256KB SRAM */
 
 /*
  *****************************************************************************
#1 lore raw
Quoted 2 lines · Mark A. Greer

ppc32: Fix wrong size for mv64[34]60's internal SRAM.

This got a reject against other ppc32 patches which I had (they've all just been flushed to Linus).

The reject was in arch/ppc/Kconfig. Please check that I fixed it up correctly.

From: "Mark A. Greer" <[email protected]>

ppc32: Fix wrong size for mv64[34]60's internal SRAM.

- Fix incorrect SRAM size
- Minor Kconfig cleanups for mv64x60 platforms

Signed-off-by Mark A. Greer <[email protected]>
Signed-off-by Andrew Morton <[email protected]>

---

 25-akpm/arch/ppc/Kconfig               |   10 ++--------
 25-akpm/arch/ppc/platforms/chestnut.h  |    4 ++--
 25-akpm/arch/ppc/platforms/katana.h    |    2 +-
 25-akpm/include/asm-ppc/mv64x60_defs.h |    2 +-
 4 files changed, 6 insertions(+), 12 deletions(-)
arch/ppc/Kconfig renamed from arch/ppc/Kconfig~ppc32-fix-mv64x60-internal-sram-size +2 -8
diff -puN arch/ppc/Kconfig~ppc32-fix-mv64x60-internal-sram-size arch/ppc/Kconfig
@@ -577,7 +577,6 @@ config SANDPOINT
 
 config RADSTONE_PPC7D
 	bool "Radstone Technology PPC7D board"
-	select MV64360
 
 config ADIR
 	bool "SBS-Adirondack"

@@ -753,16 +752,11 @@ config GT64260
 	depends on EV64260 || CPCI690
 	default y
 
-config MV64360
+config MV64360		# Really MV64360 & MV64460
 	bool
-	depends on KATANA || RADSTONE_PPC7D || HDPU
+	depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU
 	default y
 
-config MV64360
-	bool
-	depends on CHESTNUT
-  	default y
-
 config MV64X60
 	bool
 	depends on (GT64260 || MV64360)
arch/ppc/platforms/chestnut.h renamed from arch/ppc/platforms/chestnut.h~ppc32-fix-mv64x60-internal-sram-size +2 -2
diff -puN arch/ppc/platforms/chestnut.h~ppc32-fix-mv64x60-internal-sram-size arch/ppc/platforms/chestnut.h
@@ -28,8 +28,8 @@
  *    0xffd00000-0xffd00004      - CPLD
  *    0xffc00000-0xffc0000f      - UART
  *    0xffb00000-0xffb07fff      - FRAM
- *    0xffa00000-0xffafffff      - *** HOLE ***
- *    0xff800000-0xff9fffff      - MV64460 Integrated SRAM
+ *    0xff840000-0xffafffff      - *** HOLE ***
+ *    0xff800000-0xff83ffff      - MV64460 Integrated SRAM
  *    0xfe000000-0xff8fffff      - *** HOLE ***
  *    0xfc000000-0xfdffffff      - 32bit Flash
  *    0xf1010000-0xfbffffff      - *** HOLE ***
arch/ppc/platforms/katana.h renamed from arch/ppc/platforms/katana.h~ppc32-fix-mv64x60-internal-sram-size +1 -1
diff -puN arch/ppc/platforms/katana.h~ppc32-fix-mv64x60-internal-sram-size arch/ppc/platforms/katana.h
@@ -24,7 +24,7 @@
  * on a boundary that is a multiple of the window size):
  *
  *    0xff800000-0xffffffff      - Boot window
- *    0xf8400000-0xf85fffff      - Internal SRAM
+ *    0xf8400000-0xf843ffff      - Internal SRAM
  *    0xf8200000-0xf83fffff      - CPLD
  *    0xf8100000-0xf810ffff      - MV64360 Registers (CONFIG_MV64X60_NEW_BASE)
  *    0xf8000000-0xf80fffff      - Socketed FLASH
include/asm-ppc/mv64x60_defs.h renamed from include/asm-ppc/mv64x60_defs.h~ppc32-fix-mv64x60-internal-sram-size +1 -1
diff -puN include/asm-ppc/mv64x60_defs.h~ppc32-fix-mv64x60-internal-sram-size include/asm-ppc/mv64x60_defs.h
@@ -347,7 +347,7 @@
 #define	MV64360_SRAM_ERR_DATA_HI		0x03a0
 #define	MV64360_SRAM_ERR_PARITY			0x03a8
 
-#define	MV64360_SRAM_SIZE			0x00200000 /* 2 MB of SRAM */
+#define	MV64360_SRAM_SIZE			0x00040000 /* 2Mb/256KB SRAM */
 
 /*
  *****************************************************************************

_

author
#2 lore raw

Yes, it looks correct to me. Sorry for the bad patch.

Mark
--

Quoted 104 lines · Andrew Morton
Quoted 3 lines · Mark A. Greer

ppc32: Fix wrong size for mv64[34]60's internal SRAM.

This got a reject against other ppc32 patches which I had (they've all just been flushed to Linus).

The reject was in arch/ppc/Kconfig. Please check that I fixed it up correctly.

From: "Mark A. Greer" <[email protected]>

ppc32: Fix wrong size for mv64[34]60's internal SRAM.

- Fix incorrect SRAM size
- Minor Kconfig cleanups for mv64x60 platforms

Signed-off-by Mark A. Greer <[email protected]>
Signed-off-by Andrew Morton <[email protected]>

---

25-akpm/arch/ppc/Kconfig               |   10 ++--------
25-akpm/arch/ppc/platforms/chestnut.h  |    4 ++--
25-akpm/arch/ppc/platforms/katana.h    |    2 +-
25-akpm/include/asm-ppc/mv64x60_defs.h |    2 +-
4 files changed, 6 insertions(+), 12 deletions(-)

diff -puN arch/ppc/Kconfig~ppc32-fix-mv64x60-internal-sram-size arch/ppc/Kconfig

arch/ppc/Kconfig renamed from arch/ppc/Kconfig~ppc32-fix-mv64x60-internal-sram-size +0 -0
@@ -577,7 +577,6 @@ config SANDPOINT

config RADSTONE_PPC7D
bool "Radstone Technology PPC7D board"

arch/ppc/Kconfig renamed from arch/ppc/Kconfig~ppc32-fix-mv64x60-internal-sram-size +0 -1
-	select MV64360

config ADIR
bool "SBS-Adirondack"

arch/ppc/Kconfig renamed from arch/ppc/Kconfig~ppc32-fix-mv64x60-internal-sram-size +2 -7
@@ -753,16 +752,11 @@ config GT64260
 	depends on EV64260 || CPCI690
 	default y
 
-config MV64360
+config MV64360		# Really MV64360 & MV64460
 	bool
-	depends on KATANA || RADSTONE_PPC7D || HDPU
+	depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU
 	default y
 
-config MV64360
-	bool
-	depends on CHESTNUT
-  	default y
-

config MV64X60

	bool
	depends on (GT64260 || MV64360)

diff -puN arch/ppc/platforms/chestnut.h~ppc32-fix-mv64x60-internal-sram-size arch/ppc/platforms/chestnut.h

arch/ppc/platforms/chestnut.h renamed from arch/ppc/platforms/chestnut.h~ppc32-fix-mv64x60-internal-sram-size +2 -2
@@ -28,8 +28,8 @@
 *    0xffd00000-0xffd00004      - CPLD
 *    0xffc00000-0xffc0000f      - UART
 *    0xffb00000-0xffb07fff      - FRAM
- *    0xffa00000-0xffafffff      - *** HOLE ***
- *    0xff800000-0xff9fffff      - MV64460 Integrated SRAM
+ *    0xff840000-0xffafffff      - *** HOLE ***
+ *    0xff800000-0xff83ffff      - MV64460 Integrated SRAM
 *    0xfe000000-0xff8fffff      - *** HOLE ***
 *    0xfc000000-0xfdffffff      - 32bit Flash
 *    0xf1010000-0xfbffffff      - *** HOLE ***

diff -puN arch/ppc/platforms/katana.h~ppc32-fix-mv64x60-internal-sram-size arch/ppc/platforms/katana.h

arch/ppc/platforms/katana.h renamed from arch/ppc/platforms/katana.h~ppc32-fix-mv64x60-internal-sram-size +1 -1
@@ -24,7 +24,7 @@
 * on a boundary that is a multiple of the window size):
 *
 *    0xff800000-0xffffffff      - Boot window
- *    0xf8400000-0xf85fffff      - Internal SRAM
+ *    0xf8400000-0xf843ffff      - Internal SRAM
 *    0xf8200000-0xf83fffff      - CPLD
 *    0xf8100000-0xf810ffff      - MV64360 Registers (CONFIG_MV64X60_NEW_BASE)
 *    0xf8000000-0xf80fffff      - Socketed FLASH

diff -puN include/asm-ppc/mv64x60_defs.h~ppc32-fix-mv64x60-internal-sram-size include/asm-ppc/mv64x60_defs.h

include/asm-ppc/mv64x60_defs.h renamed from include/asm-ppc/mv64x60_defs.h~ppc32-fix-mv64x60-internal-sram-size +1 -1
@@ -347,7 +347,7 @@
 #define	MV64360_SRAM_ERR_DATA_HI		0x03a0
 #define	MV64360_SRAM_ERR_PARITY			0x03a8
 
-#define	MV64360_SRAM_SIZE			0x00200000 /* 2 MB of SRAM */
+#define	MV64360_SRAM_SIZE			0x00040000 /* 2Mb/256KB SRAM */
 
 /*
 *****************************************************************************

_