head.S: a small typo
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It was why ifdef
__LP64__ofalign_rfi
This is point 2 on page F-4 and F-5 of the arch.
#ifdef __LP64__ /* move to psw.h? */
#define PSW_BITS PSW_Q+PSW_I+PSW_D+PSW_P+PSW_R
#else
#define PSW_BITS PSW_SM_Q
#endif
$rfi:
/* turn off troublesome PSW bits */
rsm PSW_BITS,%r0
/* kernel PSW:
* - no interruptions except HPMC and TOC (which are handled by PDC)
* - Q bit set (IODC / PDC interruptions)
* - big-endian
* - virtually mapped
*/
The above code turns off the Q bit in both 32 and 64 bit kernels. Thus, it's not clear why this is only needed in a 64-bit kernel. Indeed pacache.S uses this sequence. The comment seems to imply that at one time the Q bit was set in this code.
The clearing rsm can't be within 8 instructions of a page boundary. Thus, it seems the alignment of 256 can be reduced to 128 in head.S. We also seem to have one more nop than needed.
The alignment of 128 used for flush_tlb_all_local and disable_sr_hashing_asm might be too small. For example, the second rsm in disable_sr_hashing_asm is 31 instructions after the first.
Dave
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J. David Anglin [email protected] National Research Council of Canada (613) 990-0752 (FAX: 952-6602) _______________________________________________ parisc-linux mailing list [email protected] http://lists.parisc-linux.org/mailman/listinfo/parisc-linux