: SN Hotplug Driver - moving of header files
PATCH 2/6 : SN Hotplug Driver - moving of header files
This patch moves header files out of the arch/ia64/sn directories and into include/asm-ia64/sn. These files were being included by other subsystems and should be under include/asm-ia64/sn.
Signed-off-by Prarit Bhargava <[email protected]>
arch/ia64/sn/include/pci/pcibr_provider.h | 149 ------------- arch/ia64/sn/include/pci/pcibus_provider_defs.h | 43 --- arch/ia64/sn/include/pci/pcidev.h | 53 ---- arch/ia64/sn/include/pci/pic.h | 261 ------------------------ arch/ia64/sn/include/pci/tiocp.h | 256 ----------------------- arch/ia64/sn/include/xtalk/hubdev.h | 2 arch/ia64/sn/kernel/io_init.c | 17 - arch/ia64/sn/kernel/irq.c | 14 - arch/ia64/sn/pci/pci_dma.c | 6 arch/ia64/sn/pci/pcibr/pcibr_ate.c | 6 arch/ia64/sn/pci/pcibr/pcibr_dma.c | 18 - arch/ia64/sn/pci/pcibr/pcibr_provider.c | 14 - arch/ia64/sn/pci/pcibr/pcibr_reg.c | 12 - include/asm-ia64/sn/pcibr_provider.h | 160 ++++++++++++++ include/asm-ia64/sn/pcibus_provider_defs.h | 43 +++ include/asm-ia64/sn/pcidev.h | 59 +++++ include/asm-ia64/sn/pic.h | 261 ++++++++++++++++++++++++ include/asm-ia64/sn/tiocp.h | 256 +++++++++++++++++++++++ 18 files changed, 825 insertions(+), 805 deletions(-)
arch/ia64/sn/include/pci/pcibr_provider.h +0 -149
@@ -1,149 +0,0 @@ -/* -* This file is subject to the terms and conditions of the GNU General Public -* License. See the file "COPYING" in the main directory of this archive -* for more details. -* -* Copyright (C) 1992-1997,2000-2004 Silicon Graphics, Inc. All rights reserved. -*/ -#ifndef _ASM_IA64_SN_PCI_PCIBR_PROVIDER_H -#define _ASM_IA64_SN_PCI_PCIBR_PROVIDER_H - -/* Workarounds */ -#define PV907516 (1 << 1)/* TIOCP: Don't write the write buffer flush reg */ - -#define BUSTYPE_MASK 0x1 - -/* Macros given a pcibus structure */ -#define IS_PCIX (ps) ((ps)->pbi_bridge_mode & BUSTYPE_MASK) -#define IS_PCI_BRIDGE_ASIC (asic) (asic == PCIIO_ASIC_TYPE_PIC || \ - asic == PCIIO_ASIC_TYPE_TIOCP) -#define IS_PIC_SOFT (ps) (ps->pbi_bridge_type == PCIBR_BRIDGETYPE_PIC) - - -/* -* The different PCI Bridge types supported on the SGI Altix platforms -*/ -#define PCIBR_BRIDGETYPE_UNKNOWN -1 -#define PCIBR_BRIDGETYPE_PIC 2 -#define PCIBR_BRIDGETYPE_TIOCP 3 - -/* -* Bridge 64bit Direct Map Attributes -*/ -#define PCI64_ATTR_PREF (1ull << 59) -#define PCI64_ATTR_PREC (1ull << 58) -#define PCI64_ATTR_VIRTUAL (1ull << 57) -#define PCI64_ATTR_BAR (1ull << 56) -#define PCI64_ATTR_SWAP (1ull << 55) -#define PCI64_ATTR_VIRTUAL1 (1ull << 54) - -#define PCI32_LOCAL_BASE 0 -#define PCI32_MAPPED_BASE 0x40000000 -#define PCI32_DIRECT_BASE 0x80000000 - -#define IS_PCI32_MAPPED (x) ((uint64_t)(x) < PCI32_DIRECT_BASE && \ - (uint64_t)(x) >= PCI32_MAPPED_BASE) -#define IS_PCI32_DIRECT (x) ((uint64_t)(x) >= PCI32_MAPPED_BASE) - - -/* -* Bridge PMU Address Transaltion Entry Attibutes -*/ -#define PCI32_ATE_V (0x1 << 0) -#define PCI32_ATE_CO (0x1 << 1) -#define PCI32_ATE_PREC (0x1 << 2) -#define PCI32_ATE_PREF (0x1 << 3) -#define PCI32_ATE_BAR (0x1 << 4) -#define PCI32_ATE_ADDR_SHFT 12 - -#define MINIMAL_ATES_REQUIRED (addr, size) \ - (IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1)) - -#define MINIMAL_ATE_FLAG (addr, size) \ - (MINIMAL_ATES_REQUIRED((uint64_t)addr, size) ? 1 : 0) - -/* bit 29 of the pci address is the SWAP bit */ -#define ATE_SWAPSHIFT 29 -#define ATE_SWAP_ON (x) ((x) |= (1 << ATE_SWAPSHIFT)) -#define ATE_SWAP_OFF (x) ((x) &= ~(1 << ATE_SWAPSHIFT)) - -/* -* I/O page size -*/ -#if PAGE_SIZE <16384 -#define IOPFNSHIFT 12/* 4K per mapped page */ -#else -#define IOPFNSHIFT 14/* 16K per mapped page */ -#endif - -#define IOPGSIZE (1 << IOPFNSHIFT) -#define IOPG (x) ((x) >> IOPFNSHIFT) -#define IOPGOFF (x) ((x) & (IOPGSIZE-1)) - -#define PCIBR_DEV_SWAP_DIR (1ull << 19) -#define PCIBR_CTRL_PAGE_SIZE (0x1 << 21) - -/* -* PMU resources. -*/ -struct ate_resource { -uint64_t *ate; -uint64_t num_ate; -uint64_t lowest_free_index; -}; - -struct pcibus_info { -struct pcibus_bussoft pbi_buscommon;/* common header */ -uint32_t pbi_moduleid; -short pbi_bridge_type; -short pbi_bridge_mode; - -struct ate_resource pbi_int_ate_resource; -uint64_t pbi_int_ate_size; - -uint64_t pbi_dir_xbase; -char pbi_hub_xid; - -uint64_t pbi_devreg[8 ]; -spinlock_t pbi_lock; - -uint32_t pbi_valid_devices; -uint32_t pbi_enabled_devices; -}; - -/* -* pcibus_info structure locking macros -*/ -inline static unsigned long -pcibr_lock (struct pcibus_info *pcibus_info) -{ -unsigned long flag; -spin_lock_irqsave (&pcibus_info->pbi_lock, flag); -return (flag); -} -#define pcibr_unlock (pcibus_info, flag) spin_unlock_irqrestore(&pcibus_info->pbi_lock, flag) - -extern void *pcibr_bus_fixup (struct pcibus_bussoft *); -extern uint64_t pcibr_dma_map (struct pcidev_info *,unsigned long ,size_t ,unsigned int ); -extern void pcibr_dma_unmap (struct pcidev_info *,dma_addr_t ,int ); - -/* -* prototypes for the bridge asic register access routines in pcibr_reg.c -*/ -extern void pcireg_control_bit_clr (struct pcibus_info *,uint64_t ); -extern void pcireg_control_bit_set (struct pcibus_info *,uint64_t ); -extern uint64_t pcireg_tflush_get (struct pcibus_info *); -extern uint64_t pcireg_intr_status_get (struct pcibus_info *); -extern void pcireg_intr_enable_bit_clr (struct pcibus_info *,uint64_t ); -extern void pcireg_intr_enable_bit_set (struct pcibus_info *,uint64_t ); -extern void pcireg_intr_addr_addr_set (struct pcibus_info *,int ,uint64_t ); -extern void pcireg_force_intr_set (struct pcibus_info *,int ); -extern uint64_t pcireg_wrb_flush_get (struct pcibus_info *,int ); -extern void pcireg_int_ate_set (struct pcibus_info *,int ,uint64_t ); -extern uint64_t *pcireg_int_ate_addr (struct pcibus_info *,int ); -extern void pcibr_force_interrupt (struct sn_irq_info *sn_irq_info); -extern void pcibr_change_devices_irq (struct sn_irq_info *sn_irq_info); -extern int pcibr_ate_alloc (struct pcibus_info *,int ); -extern void pcibr_ate_free (struct pcibus_info *,int ); -extern void ate_write (struct pcibus_info *,int ,int ,uint64_t ); -#endif
arch/ia64/sn/include/pci/pcibus_provider_defs.h +0 -43
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arch/ia64/sn/include/pci/pcidev.h +0 -53
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arch/ia64/sn/include/pci/pic.h +0 -261
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arch/ia64/sn/include/pci/tiocp.h +0 -256
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arch/ia64/sn/include/xtalk/hubdev.h +2 -0
@@ -8,6 +8,8 @@#ifndef _ASM_IA64_SN_XTALK_HUBDEV_H#define _ASM_IA64_SN_XTALK_HUBDEV_H +#include "xtalk/xwidgetdev.h" +#define HUB_WIDGET_ID_MAX 0xf#define DEV_PER_WIDGET (2*2*8)#define IIO_ITTE_WIDGET_BITS 4/* size of widget field */
arch/ia64/sn/kernel/io_init.c +9 -8
@@ -8,17 +8,18 @@#include <linux/bootmem.h> #include <linux/nodemask.h> -#include <asm/sn/types.h> -#include <asm/sn/sn_sal.h> #include <asm/sn/addrs.h> -#include "pci/pcibus_provider_defs.h" -#include "pci/pcidev.h" -#include "pci/pcibr_provider.h" -#include "xtalk/xwidgetdev.h" #include <asm/sn/geo.h> -#include "xtalk/hubdev.h" #include <asm/sn/io.h> +#include <asm/sn/pcibus_provider_defs.h> +#include <asm/sn/pcibr_provider.h> +#include <asm/sn/pcidev.h> #include <asm/sn/simulator.h> +#include <asm/sn/sn_sal.h> +#include <asm/sn/types.h> + +#include "xtalk/xwidgetdev.h" +#include "xtalk/hubdev.h" nasid_t master_nasid =INVALID_NASID ;/* Partition Master */
@@ -192,7 +193,7 @@ static void sn_fixup_ionodes(void)* from our PCI provider include PIO maps to BAR space and interrupt * objects. */ -static void sn_pci_fixup_slot (struct pci_dev *dev) +void sn_pci_fixup_slot (struct pci_dev *dev) {int idx;int segment =0 ;
arch/ia64/sn/kernel/irq.c +7 -7
@@ -10,15 +10,15 @@#include <linux/irq.h> #include <linux/spinlock.h> -#include <asm/sn/intr.h> -#include <asm/sn/addrs.h> #include <asm/sn/arch.h> -#include "xtalk/xwidgetdev.h" -#include "pci/pcibus_provider_defs.h" -#include "pci/pcidev.h" -#include "pci/pcibr_provider.h" +#include <asm/sn/addrs.h> +#include <asm/sn/intr.h> +#include <asm/sn/pcibus_provider_defs.h> +#include <asm/sn/pcibr_provider.h> +#include <asm/sn/pcidev.h> #include <asm/sn/shub_mmr.h> #include <asm/sn/sn_sal.h> +#include "xtalk/xwidgetdev.h" static void force_interrupt (int irq);static void register_intr_pda (struct sn_irq_info *sn_irq_info);
@@ -114,7 +114,7 @@ static void sn_end_irq(unsigned int irq) nasid =get_nasid (); event_occurred =HUB_L ((uint64_t *)GLOBAL_MMR_ADDR (nasid,SH_EVENT_OCCURRED )); -/* If the UART bit is set here, we may have received an +/* If the UART bit is set here, we may have received an * interrupt from the UART that the driver missed. To * make sure, we IPI ourselves to force us to look again. */
arch/ia64/sn/pci/pcibr/pcibr_ate.c +3 -3
@@ -7,10 +7,10 @@*/ #include <linux/types.h> +#include <asm/sn/pcibr_provider.h> +#include <asm/sn/pcibus_provider_defs.h> +#include <asm/sn/pcidev.h> #include <asm/sn/sn_sal.h> -#include "pci/pcibus_provider_defs.h" -#include "pci/pcidev.h" -#include "pci/pcibr_provider.h" int pcibr_invalidate_ate =0 ;/* by default don't invalidate ATE on free */
arch/ia64/sn/pci/pcibr/pcibr_dma.c +9 -9
@@ -8,18 +8,18 @@#include <linux/types.h> #include <linux/pci.h> -#include <asm/sn/sn_sal.h> + +#include <asm/sn/addrs.h> #include <asm/sn/geo.h> +#include <asm/sn/pcibr_provider.h> +#include <asm/sn/pcibus_provider_defs.h> +#include <asm/sn/pcidev.h> +#include <asm/sn/pic.h> +#include <asm/sn/sn_sal.h> +#include <asm/sn/tiocp.h> +#include "tio.h" #include "xtalk/xwidgetdev.h" #include "xtalk/hubdev.h" -#include "pci/pcibus_provider_defs.h" -#include "pci/pcidev.h" -#include "pci/tiocp.h" -#include "pci/pic.h" -#include "pci/pcibr_provider.h" -#include "pci/tiocp.h" -#include "tio.h" -#include <asm/sn/addrs.h> extern int sn_ioif_inited;
arch/ia64/sn/pci/pcibr/pcibr_provider.c +7 -7
@@ -6,18 +6,18 @@* Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved. */ -#include <linux/types.h> #include <linux/interrupt.h> +#include <linux/types.h> #include <linux/pci.h> +#include <asm/sn/addrs.h> +#include <asm/sn/geo.h> +#include <asm/sn/pcibr_provider.h> +#include <asm/sn/pcibus_provider_defs.h> +#include <asm/sn/pcidev.h> #include <asm/sn/sn_sal.h> +#include "xtalk/xwidgetdev.h" -#include <asm/sn/geo.h> #include "xtalk/hubdev.h" -#include "pci/pcibus_provider_defs.h" -#include "pci/pcidev.h" -#include "pci/pcibr_provider.h" -#include <asm/sn/addrs.h> -static int sal_pcibr_error_interrupt (struct pcibus_info *soft) {
arch/ia64/sn/pci/pcibr/pcibr_reg.c +6 -6
@@ -6,13 +6,13 @@* Copyright (C) 2004 Silicon Graphics, Inc. All rights reserved. */ -#include <linux/types.h> #include <linux/interrupt.h> -#include "pci/pcibus_provider_defs.h" -#include "pci/pcidev.h" -#include "pci/tiocp.h" -#include "pci/pic.h" -#include "pci/pcibr_provider.h" +#include <linux/types.h> +#include <asm/sn/pcibr_provider.h> +#include <asm/sn/pcibus_provider_defs.h> +#include <asm/sn/pcidev.h> +#include <asm/sn/pic.h> +#include <asm/sn/tiocp.h> union br_ptr {struct tiocp tio;
arch/ia64/sn/pci/pci_dma.c +3 -3
@@ -11,10 +11,10 @@#include <linux/module.h> #include <asm/dma.h> +#include <asm/sn/pcibus_provider_defs.h> +#include <asm/sn/pcibr_provider.h> +#include <asm/sn/pcidev.h> #include <asm/sn/sn_sal.h> -#include "pci/pcibus_provider_defs.h" -#include "pci/pcidev.h" -#include "pci/pcibr_provider.h" #define SG_ENT_VIRT_ADDRESS (sg) (page_address((sg)->page) + (sg)->offset)#define SG_ENT_PHYS_ADDRESS (SG ) virt_to_phys(SG_ENT_VIRT_ADDRESS(SG))
include/asm-ia64/sn/pcibr_provider.h +160 -0
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include/asm-ia64/sn/pcibus_provider_defs.h +43 -0
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include/asm-ia64/sn/pcidev.h +59 -0
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include/asm-ia64/sn/pic.h +261 -0
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include/asm-ia64/sn/tiocp.h +256 -0
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