lockless pagecache 2/7]

Forwarded to linux-arch for comments.

It would be preferable if replies could go to the lkml thread, but either way is fine.

Thanks,
Nick

-------- Original Message --------
Subject: [PATCH 2.6.13] lockless pagecache 2/7
Date: Fri, 02 Sep 2005 16:29:10 +1000
From: Nick Piggin <[email protected]>
To: Linux Memory Management <[email protected]>, linux-kernel <[email protected]>
References: <[email protected]> <[email protected]>

2/7
Implement atomic_cmpxchg for i386 and ppc64. Is there any architecture that won't be able to implement such an operation?

Introduce an atomic_cmpxchg operation. Implement this for i386 and ppc64.

Index: linux-2.6/include/asm-i386/atomic.h
===================================================================
@@ -215,6 +215,8 @@ static __inline__ int atomic_sub_return(
 	return atomic_add_return(-i,v);
 }
 
+#define atomic_cmpxchg(v, old, new)	((int)cmpxchg(&((v)->counter), old, new))
+
 #define atomic_inc_return(v)  (atomic_add_return(1,v))
 #define atomic_dec_return(v)  (atomic_sub_return(1,v))
 

Index: linux-2.6/include/asm-ppc64/atomic.h
===================================================================
@@ -162,6 +162,8 @@ static __inline__ int atomic_dec_return(
 	return t;
 }
 
+#define atomic_cmpxchg(v, o, n)	((int)cmpxchg(&((v)->counter), (o), (n)))
+
 #define atomic_sub_and_test(a, v)	(atomic_sub_return((a), (v)) == 0)
 #define atomic_dec_and_test(v)		(atomic_dec_return((v)) == 0)
 

Sparc32 lacks compare and exchange. I think PARISC lacks it as well.

For these older SMP systems, at best you can assume there is some kind of spinlock and perhaps a straight atomic exchange instruction. You really can't assume the existance of compare-and-swap.

Thanks David, I suspected as much.

PARISC emulates cmpxchg. I suspect sparc could do the same? (provided all access goes through the atomic_xxx accessors)

Nick

SUSE Labs, Novell Inc.

Send instant messages to your online friends http://au.messenger.yahoo.com 

If Sparc has atomic stores to aligned addresses (and I bet it does), then the PA-RISC style emulation should work just fine.