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BCC, ELKS 24 Bit addressing mode

DISCUSSION Serdar Sutay 8 participants 11 messages Mar 23, 2006 – Mar 25, 2006

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#0 lore raw

Dear All,

I am porting ELKS to a special version of 80186 to be used in embedded devices. This special version known as Turbo186 is using 24 bit addressing using a special addressing scheme. So I need to modify bcc or as86 to support 24 bit addressing mode.

This type of operation is common in embedded usage. 24 bit addressing is working like this,

In normal 20 bit addressing when far jumps are used, two 16 bit operands are given for address calculation. First operand is left shifted 4 bits and added to second operand, then 20 bit address is calculated.

In 24 bit addressing mode, first operand is left shifted 8 bits and added to second operand, resulting in 24 bit address.

What am I required to do to support 24 bits addressing in bcc? Can you give me some insight or guide me to the correct person?

Thank you for your consideration and help.

Kindest regards,

Serdar Sutay

#1 lore raw
Quoted 14 lines · Serdar Sutay

Dear All,

I am porting ELKS to a special version of 80186 to be used in embedded devices. This special version known as Turbo186 is using 24 bit addressing using a special addressing scheme. So I need to modify bcc or as86 to support 24 bit addressing mode.

This type of operation is common in embedded usage. 24 bit addressing is working like this,

In normal 20 bit addressing when far jumps are used, two 16 bit operands are given for address calculation. First operand is left shifted 4 bits and added to second operand, then 20 bit address is calculated.

In 24 bit addressing mode, first operand is left shifted 8 bits and added to second operand, resulting in 24 bit address.

What am I required to do to support 24 bits addressing in bcc? Can you give me some insight or guide me to the correct person?

Thank you for your consideration and help.

Quoted 8 lines

Kindest regards,

Serdar Sutay
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Basically you're working with a 286 that's been lobotmized down to a 186 with the addressing features in place?

#2 lore raw
Quoted 18 lines · Segin
Quoted 16 lines · Serdar Sutay

Dear All,

I am porting ELKS to a special version of 80186 to be used in embedded devices. This special version known as Turbo186 is using 24 bit addressing using a special addressing scheme. So I need to modify bcc or as86 to support 24 bit addressing mode.

This type of operation is common in embedded usage. 24 bit addressing is working like this,

In normal 20 bit addressing when far jumps are used, two 16 bit operands are given for address calculation. First operand is left shifted 4 bits and added to second operand, then 20 bit address is calculated.

In 24 bit addressing mode, first operand is left shifted 8 bits and added to second operand, resulting in 24 bit address.

What am I required to do to support 24 bits addressing in bcc? Can you give me some insight or guide me to the correct person?

Thank you for your consideration and help.

Kindest regards,

Quoted 9 lines
Quoted 6 lines

Serdar Sutay
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Basically you're working with a 286 that's been lobotmized down to a 186 with the addressing features in place?

yes, but I need to address 16 Mbytes of RAM so I need to use 24 bit addressing mode.

Can Bcc compiler handle this automatically?

#3 lore raw
Quoted 4 lines
Quoted 3 lines

Basically you're working with a 286 that's been lobotmized down to a 186 with the addressing features in place?

yes, but I need to address 16 Mbytes of RAM so I need to use 24 bit addressing mode.

I hate to ask, but why bother with a 186 in the first place? As I understand it, the only real difference (other than some hardware integration) between the two is that the 286 has a 24 bit address space....which you'd need if you're going to use 16M of RAM anyway.

Dan

#4 lore raw

186 CPUs have various non-CPU functionality integrated into the chip itself, which is one reason it's popular in some embedded designs.

Quoted 14 lines · Dan Olson
Quoted 4 lines
Quoted 3 lines

Basically you're working with a 286 that's been lobotmized down to a 186 with the addressing features in place?

yes, but I need to address 16 Mbytes of RAM so I need to use 24 bit addressing mode.

I hate to ask, but why bother with a 186 in the first place? As I understand it, the only real difference (other than some hardware integration) between the two is that the 286 has a 24 bit address space....which you'd need if you're going to use 16M of RAM anyway.

Dan
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#5 lore raw

True, I undesrstand, I just thought that the extra banking logic needed and the software overhead might negate that added integration, but I'm not sure what your goal is in the project. I've got some 186 CPUs sitting around if you have any need for a couple.

Dan

Quoted 22 lines · Jody

186 CPUs have various non-CPU functionality integrated into the chip itself, which is one reason it's popular in some embedded designs.

Quoted 6 lines · Dan Olson
Quoted 4 lines
Quoted 3 lines

Basically you're working with a 286 that's been lobotmized down to a 186 with the addressing features in place?

yes, but I need to address 16 Mbytes of RAM so I need to use 24 bit addressing mode.

Quoted 8 lines

I hate to ask, but why bother with a 186 in the first place? As I understand it, the only real difference (other than some hardware integration) between the two is that the 286 has a 24 bit address space....which you'd need if you're going to use 16M of RAM anyway.

Dan
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#6 lore raw

Hello!
As for your problems, sir, I also am interested. Please keep us advised.

As it happens, Dan Olson, I do have a need for some. Not too many. What do we need to do to arrange this transaction?
---
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"The Force will be with you. Always."
----- Original Message -----
From: "Dan Olson" <[email protected]>
To: "Linux-8086" <[email protected]>
Sent: Friday, March 24, 2006 12:28 AM
Subject: Re: BCC, ELKS 24 Bit addressing mode

Quoted 11 lines

True, I undesrstand, I just thought that the extra banking logic needed and the software overhead might negate that added integration, but I'm not sure what your goal is in the project. I've got some 186 CPUs sitting around if you have any need for a couple.

Dan

Quoted 1 line · Jody

186 CPUs have various non-CPU functionality integrated into the chip

itself,

Quoted 4 lines
Quoted 4 lines

which is one reason it's popular in some embedded designs.

Quoted 1 line · Dan Olson
Quoted 1 line
Quoted 1 line

Basically you're working with a 286 that's been lobotmized down to a

186

Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines

with the addressing features in place?

yes, but I need to address 16 Mbytes of RAM so I need to use 24 bit addressing mode.

Quoted 8 lines
Quoted 8 lines
Quoted 8 lines

I hate to ask, but why bother with a 186 in the first place? As I understand it, the only real difference (other than some hardware integration) between the two is that the 286 has a 24 bit address space....which you'd need if you're going to use 16M of RAM anyway.

Dan
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To unsubscribe from this list: send the line "unsubscribe linux-8086"

in

Quoted 12 lines
Quoted 8 lines
Quoted 3 lines

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More majordomo info at http://vger.kernel.org/majordomo-info.html

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#7 lore raw
In reply to Dan Olson
Quoted 3 lines · Dan Olson

I hate to ask, but why bother with a 186 in the first place? As I understand it, the only real difference (other than some hardware integration) between the two is that the 286 has a 24 bit address space....which you'd need if you're going to use 16M of RAM anyway.

Dan

That was something I was thinking about after that post. I wonder what the benefits to have addressing mode even more constrained than found in 286 and still bother with those crappy 64kb segments? Is that hardware really cheap or wide spread around?

Anyway, it looks like you may add this addressing mode handling to EXE image loader that would change all cross-segment access addresses to be compatible with this addressing mode. You may want to try it under plain DOS. Btw, seems this way you still keep all EXE compatible with 8088.

Andrey

#8 lore raw
In reply to Serdar Sutay

So basically, you've got segmentation in 256-byte increments instead of 16 in order to handle an additional four address lines, correct?

That sounds like something that shouldn't be difficult to change, but I know nothing about how to do it.

Jody

Quoted 22 lines · Serdar Sutay

Dear All,

I am porting ELKS to a special version of 80186 to be used in embedded devices. This special version known as Turbo186 is using 24 bit addressing using a special addressing scheme. So I need to modify bcc or as86 to support 24 bit addressing mode.

This type of operation is common in embedded usage. 24 bit addressing is working like this,

In normal 20 bit addressing when far jumps are used, two 16 bit operands are given for address calculation. First operand is left shifted 4 bits and added to second operand, then 20 bit address is calculated.

In 24 bit addressing mode, first operand is left shifted 8 bits and added to second operand, resulting in 24 bit address.

What am I required to do to support 24 bits addressing in bcc? Can you give me some insight or guide me to the correct person?

Thank you for your consideration and help.

Kindest regards,

Serdar Sutay
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#9 lore raw

Hi,

I cannot help you unfortunately But please let me know what happens I am really interested!

Thanks,

Eric des Courtis

Quoted 44 lines · Jody

So basically, you've got segmentation in 256-byte increments instead of 16 in order to handle an additional four address lines, correct?

That sounds like something that shouldn't be difficult to change, but I know nothing about how to do it.

Jody

Quoted 22 lines · Serdar Sutay

Dear All,

I am porting ELKS to a special version of 80186 to be used in embedded devices. This special version known as Turbo186 is using 24 bit addressing using a special addressing scheme. So I need to modify bcc or as86 to support 24 bit addressing mode.

This type of operation is common in embedded usage. 24 bit addressing is working like this,

In normal 20 bit addressing when far jumps are used, two 16 bit operands are given for address calculation. First operand is left shifted 4 bits and added to second operand, then 20 bit address is calculated.

In 24 bit addressing mode, first operand is left shifted 8 bits and added to second operand, resulting in 24 bit address.

What am I required to do to support 24 bits addressing in bcc? Can you give me some insight or guide me to the correct person?

Thank you for your consideration and help.

Quoted 8 lines

Kindest regards,

Serdar Sutay
-
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#10 lore raw
In reply to Serdar Sutay

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Serdar Sutay wrote:
[...]

Quoted 2 lines

What am I required to do to support 24 bits addressing in bcc? Can you give me some insight or guide me to the correct person?

AFAIK, bcc knows nothing about segmentation --- it deals strictly with 16-bit code. Which means that nothing will need changing. If the Turbo186 uses all the same opcodes as a normal 186, you wouldn't even need to modify as86.

What *will* need modification is the kernel code that allocates segments and sets up the segment registers for the user processes, and unfortunately I don't know anything about how that works. It's entirely feasible that all you would need to do is to change a few small chunks of assembly.

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