spufs: support multi-platform priv1 access
Subsystems (3)
PATCH 3/4 spufs: support multi-platform priv1 access
To support muti-platform binaries the spu hypervisor accessor routines must have runtime binding.
I removed the existing statically linked routines in spu.h and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h that operate indirectly through an ops struct spu_priv1_ops. spu_priv1_mmio.c contains the instance of the accessor routines for running on raw hardware.
Signed-off-by Geoff Levand <[email protected]>
---
arch/powerpc/platforms/cell/setup.c +4 -0
@@ -46,6 +46,7 @@#include <asm/cputable.h> #include <asm/ppc-pci.h> #include <asm/irq.h> +#include <asm/spu_priv1.h> #include "interrupt.h" #include "iommu.h"
@@ -149,6 +150,9 @@ { ppc_md.init_IRQ = iic_init_IRQ; ppc_md.get_irq = iic_get_irq; +#ifdef CONFIG_SPU_BASE + spu_priv1_ops = &spu_priv1_mmio_ops; +#endif #ifdef CONFIG_SMP smp_init_cell ();
arch/powerpc/platforms/cell/spu_base.c +7 -0
@@ -34,10 +34,15 @@#include <asm/prom.h> #include <linux/mutex.h> #include <asm/spu.h> +#include <asm/spu_priv1.h> #include <asm/mmu_context.h> #include "interrupt.h" +const struct spu_priv1_ops *spu_priv1_ops; + +EXPORT_SYMBOL_GPL (spu_priv1_ops); +static int __spu_trap_invalid_dma (struct spu *spu) {pr_debug ("%s\n" , __FUNCTION__);
@@ -687,6 +692,8 @@struct device_node *node;int ret; +BUG_ON (!spu_priv1_ops); + ret = -ENODEV ;for (node =of_find_node_by_type (NULL ,"spe" ); node; node =of_find_node_by_type (node,"spe" )) {
arch/powerpc/platforms/cell/spu_priv1_mmio.c +73 -41
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arch/powerpc/platforms/cell/spufs/hw_ops.c +1 -0
@@ -32,6 +32,7 @@#include <asm/io.h> #include <asm/spu.h> +#include <asm/spu_priv1.h> #include <asm/spu_csa.h> #include <asm/mmu_context.h> #include "spufs.h"
arch/powerpc/platforms/cell/spufs/switch.c +1 -0
@@ -46,6 +46,7 @@#include <asm/io.h> #include <asm/spu.h> +#include <asm/spu_priv1.h> #include <asm/spu_csa.h> #include <asm/mmu_context.h>
include/asm-powerpc/spu.h +0 -24
@@ -182,30 +182,6 @@ }#endif /* MODULE */ - -/* access to priv1 registers */ -void spu_int_mask_and (struct spu *spu,int class,u64 mask); -void spu_int_mask_or (struct spu *spu,int class,u64 mask); -void spu_int_mask_set (struct spu *spu,int class,u64 mask); -u64 spu_int_mask_get (struct spu *spu,int class); -void spu_int_stat_clear (struct spu *spu,int class,u64 stat); -u64 spu_int_stat_get (struct spu *spu,int class); -void spu_int_route_set (struct spu *spu,u64 route); -u64 spu_mfc_dar_get (struct spu *spu); -u64 spu_mfc_dsisr_get (struct spu *spu); -void spu_mfc_dsisr_set (struct spu *spu,u64 dsisr); -void spu_mfc_sdr_set (struct spu *spu,u64 sdr); -void spu_mfc_sr1_set (struct spu *spu,u64 sr1); -u64 spu_mfc_sr1_get (struct spu *spu); -void spu_mfc_tclass_id_set (struct spu *spu,u64 tclass_id); -u64 spu_mfc_tclass_id_get (struct spu *spu); -void spu_tlb_invalidate (struct spu *spu); -void spu_resource_allocation_groupID_set (struct spu *spu,u64 id); -u64 spu_resource_allocation_groupID_get (struct spu *spu); -void spu_resource_allocation_enable_set (struct spu *spu,u64 enable); -u64 spu_resource_allocation_enable_get (struct spu *spu); - -/* * This defines the Local Store, Problem Area and Privlege Area of an SPU. */
include/asm-powerpc/spu_priv1.h +189 -0
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