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ppc32: fix CPCI405 board support

PATCH New Matthias Fuchs 1 participant 1 message Jun 14, 2006

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Matthias Fuchs

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PATCH 1/1 ppc32: fix CPCI405 board support

Hi,

this patch brings the CPCI405 board support up to date and fixes several outstanding issues:

-add bios_fixup()
-enable RTC only when CONFIG_GEN_RTC defined -corrected CompactPCI interrupt map
-added cpci405_early_serial_map for correct UART clocking -removed unused code

Matthias

Signed-off-by Matthias Fuchs <[email protected]>

Bring CPCI405 board support up to date
-add bios_fixup()
-enable RTC only when CONFIG_GEN_RTC defined -corrected CompactPCI interrupt map
-added cpci405_early_serial_map for correct UART clocking -removed unused code

---
commit dc0ce6e05de6309219d9c97bcfdf7a632fcbc57b
tree b9265b8ec2935a5a8a8890a81f8bb2b381920bf3
parent 128e6ced247cda88f96fa9f2e4ba8b2c4a681560
author Matthias Fuchs <[email protected]> Wed, 14 Jun 2006 09:26:32 +0200 committer Matthias Fuchs <[email protected]> Wed, 14 Jun 2006 09:26:32 +0200

 arch/ppc/platforms/4xx/Kconfig   |    2 -
 arch/ppc/platforms/4xx/cpci405.c |  139 +++++++++++++++++++++++++++++++++++---
 arch/ppc/platforms/4xx/cpci405.h |   30 +++-----
 3 files changed, 140 insertions(+), 31 deletions(-)
arch/ppc/platforms/4xx/Kconfig +1 -1
index 174ddbc..293bd48 100644
@@ -183,7 +183,7 @@ config IBM_EMAC4
 
 config BIOS_FIXUP
 	bool
-	depends on BUBINGA || EP405 || SYCAMORE || WALNUT
+	depends on BUBINGA || EP405 || SYCAMORE || WALNUT || CPCI405
 	default y
 
 # OAK doesn't exist but wanted to keep this around for any future 403GCX boards
arch/ppc/platforms/4xx/cpci405.c +128 -11

188 lines not on this page · raw message

arch/ppc/platforms/4xx/cpci405.h +11 -19
index e27f7cb..f5a5c0c 100644
@@ -1,37 +1,29 @@
 /*
  * CPCI-405 board specific definitions
  *
- * Copyright (c) 2001 Stefan Roese ([email protected])
+ * Copyright 2001-2006 esd electronic system design - hannover germany
+ *
+ * Authors: Matthias Fuchs
+ *          [email protected]
+ *          Stefan Roese
+ *          [email protected]
  */
 
 #ifdef __KERNEL__
-#ifndef __ASM_CPCI405_H__
-#define __ASM_CPCI405_H__
+#ifndef __CPCI405_H__
+#define __CPCI405_H__
 
 #include <linux/config.h>
-
-/* We have a 405GP core */
 #include <platforms/4xx/ibm405gp.h>
-
 #include <asm/ppcboot.h>
 
-#ifndef __ASSEMBLY__
-/* Some 4xx parts use a different timebase frequency from the internal clock.
-*/
-#define bi_tbfreq bi_intfreq
-
 /* Map for the NVRAM space */
 #define CPCI405_NVRAM_PADDR	((uint)0xf0200000)
 #define CPCI405_NVRAM_SIZE	((uint)32*1024)
 
-#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK
-#define BASE_BAUD		201600
-#else
-#define BASE_BAUD		691200
-#endif
+#define BASE_BAUD		0
 
-#define PPC4xx_MACHINE_NAME "esd CPCI-405"
+#define PPC4xx_MACHINE_NAME     "esd CPCI-405"
 
-#endif /* !__ASSEMBLY__ */
-#endif	/* __ASM_CPCI405_H__ */
+#endif	/* __CPCI405_H__ */
 #endif /* __KERNEL__ */