PPC440EPx/440GRx EMAC support.

PATCH In review Valentine Barshak 4 participants 5 messages Mar 20, 2007 – Mar 21, 2007 Network drivers

Share & tools

Valentine Barshak

author

2007-03-20 19:29 UTC #0 lore raw

PATCH 1/1 PPC440EPx/440GRx EMAC support.

Add PPC440EPx/440GRx EMAC along with
Marvell 88E1111 and ET1011C PHY support.
The M88E1111 chip can be found on Sequoia board.

Signed-off-by Valentine Barshak <[email protected]>

drivers/net/ibm_emac/ibm_emac_core.c +2 -1

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac_core.c linux/drivers/net/ibm_emac/ibm_emac_core.c
@@ -86,7 +86,8 @@
 static u32 busy_phy_map;
 
 #if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX) && \
-    (defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR))
+    (defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+     defined(CONFIG_440EPX) || defined(CONFIG_440GRX))
 /* 405EP has "EMAC to PHY Control Register" (CPC0_EPCTL) which can help us
  * with PHY RX clock problem.
  * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX, which

drivers/net/ibm_emac/ibm_emac.h +11 -2

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac.h linux/drivers/net/ibm_emac/ibm_emac.h
@@ -26,7 +26,7 @@
 #if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \
     !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \
     !defined(CONFIG_440EP) && !defined(CONFIG_NP405H) && !defined(CONFIG_440SPE) && \
-    !defined(CONFIG_440GR)
+    !defined(CONFIG_440GR) && !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
 #error	"Unknown SoC. Please, check chip user manual and make sure EMAC defines are OK"
 #endif

@@ -227,9 +227,15 @@
 #define EMAC_STACR_PHYD_SHIFT		16
 #define EMAC_STACR_OC			0x00008000
 #define EMAC_STACR_PHYE			0x00004000
+#if defined(CONFIG_IBM_EMAC4V4)
+#define EMAC_STACR_STAC_MASK		0x00003800
+#define EMAC_STACR_STAC_READ		0x00001000
+#define EMAC_STACR_STAC_WRITE		0x00000800
+#else
 #define EMAC_STACR_STAC_MASK		0x00003000
 #define EMAC_STACR_STAC_READ		0x00001000
 #define EMAC_STACR_STAC_WRITE		0x00002000
+#endif
 #if !defined(CONFIG_IBM_EMAC4)
 #define EMAC_STACR_OPBC_MASK		0x00000C00
 #define EMAC_STACR_OPBC_50		0x00000000

@@ -250,8 +256,11 @@
 /*
  * For the 440SPe, AMCC inexplicably changed the polarity of
  * the "operation complete" bit in the MII control register.
+ *
+ * This change is not associated to 440SPe but to EMAC core version used in
+ * 440SPe, 440EPx, 440GRx.
  */
-#if defined(CONFIG_440SPE)
+#if defined(CONFIG_440SPE) || defined(CONFIG_IBM_EMAC4V4)
 static inline int emac_phy_done(u32 stacr)
 {
 	return !(stacr & EMAC_STACR_OC);

drivers/net/ibm_emac/ibm_emac_mal.h +1 -1

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac_mal.h linux/drivers/net/ibm_emac/ibm_emac_mal.h
@@ -35,7 +35,7 @@
     defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_NP405H)
 #define MAL_VERSION		1
 #elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
-      defined(CONFIG_440SPE)
+      defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 #define MAL_VERSION		2
 #else
 #error "Unknown SoC, please check chip manual and choose MAL 'version'"

drivers/net/ibm_emac/ibm_emac_phy.c +63 -0

71 lines not on this page · raw message

Sergei Shtylyov

2007-03-20 19:35 UTC #1 lore raw

Hello.

Quoted 5 lines · Valentine Barshak

Add PPC440EPx/440GRx EMAC along with
Marvell 88E1111 and ET1011C PHY support.
The M88E1111 chip can be found on Sequoia board.
Signed-off-by Valentine Barshak <[email protected]>

To [email protected], please.

WBR, Sergei

Olof Johansson

2007-03-21 15:50 UTC #2 lore raw

In reply to Valentine Barshak

drivers/net/ibm_emac/ibm_emac_core.c line 90

Quoted 10 lines · Valentine Barshak

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac_core.c linux/drivers/net/ibm_emac/ibm_emac_core.c

drivers/net/ibm_emac/ibm_emac_core.c +2 -1

@@ -86,7 +86,8 @@
 static u32 busy_phy_map;
 
 #if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX) && \
-    (defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR))
+    (defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+     defined(CONFIG_440EPX) || defined(CONFIG_440GRX))

This is getting out of control. Please add a config option for this, and add "select" statements to the Kconfig file where any of the above CONFIG_4.* are defined.

drivers/net/ibm_emac/ibm_emac.h line 29

Quoted 12 lines

drivers/net/ibm_emac/ibm_emac_core.c +0 -0

 /* 405EP has "EMAC to PHY Control Register" (CPC0_EPCTL) which can help us
  * with PHY RX clock problem.
  * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX, which

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac.h linux/drivers/net/ibm_emac/ibm_emac.h

drivers/net/ibm_emac/ibm_emac.h +1 -1

@@ -26,7 +26,7 @@
 #if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \
     !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \
     !defined(CONFIG_440EP) && !defined(CONFIG_NP405H) && !defined(CONFIG_440SPE) && \
-    !defined(CONFIG_440GR)
+    !defined(CONFIG_440GR) && !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)

Same here. I know you only added a couple more, but it's reached critical mass (well, it did a while ago).

-Olof

Eugene Surovegin

2007-03-21 16:28 UTC #3 lore raw

Quoted 13 lines · Olof Johansson

drivers/net/ibm_emac/ibm_emac.h line 29
Quoted 9 lines · Valentine Barshak
diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac.h linux/drivers/net/ibm_emac/ibm_emac.h
drivers/net/ibm_emac/ibm_emac.h +1 -1
@@ -26,7 +26,7 @@
 #if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \
     !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \
     !defined(CONFIG_440EP) && !defined(CONFIG_NP405H) && !defined(CONFIG_440SPE) && \
-    !defined(CONFIG_440GR)
+    !defined(CONFIG_440GR) && !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
Same here. I know you only added a couple more, but it's reached critical mass (well, it did a while ago).

No, it's not same here. Please, take a time and look at the full code this particular snippet has nothing to do with Konfig stuff.

One can argue that it can be removed altogether, but I added this ugly check for a reason - people were adding support for new 4xx SoCs blindly in the past without checking that EMAC registers weren't changed slightly.

So, Valentine, keep this particular ugly ifdef as it is.

Also, Valentine, next time CC me with any EMAC changes because I'm not actively reading PPC maillists these days.

Signature · 1 line

Eugene

Valentine Barshak

author

2007-03-21 18:14 UTC #4 lore raw

Quoted 18 lines · Eugene Surovegin

Quoted 15 lines · Olof Johansson
drivers/net/ibm_emac/ibm_emac.h line 30
Quoted 10 lines · Valentine Barshak
diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac.h linux/drivers/net/ibm_emac/ibm_emac.h
drivers/net/ibm_emac/ibm_emac.h +1 -1
@@ -26,7 +26,7 @@
 #if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \
     !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \
     !defined(CONFIG_440EP) && !defined(CONFIG_NP405H) && !defined(CONFIG_440SPE) && \
-    !defined(CONFIG_440GR)
+    !defined(CONFIG_440GR) && !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
 
Same here. I know you only added a couple more, but it's reached critical mass (well, it did a while ago).

Quoted 9 lines

No, it's not same here. Please, take a time and look at the full code this particular snippet has nothing to do with Konfig stuff.
One can argue that it can be removed altogether, but I added this ugly check for a reason - people were adding support for new 4xx SoCs blindly in the past without checking that EMAC registers weren't changed slightly.
So, Valentine, keep this particular ugly ifdef as it is.
Also, Valentine, next time CC me with any EMAC changes because I'm not actively reading PPC maillists these days.

Please, take a look at the updated 440EPx EMAC patch.
I've added IBM_EMAC_CLK_SEL option which is selected if both IBM_EMAC_PHY_RX_CLK_FIX is set and the processor is not 440GX. The other "ugly" ifdef is left unchanged.
Thanks.

drivers/net/ibm_emac/ibm_emac_core.c +3 -4

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac_core.c linux/drivers/net/ibm_emac/ibm_emac_core.c
@@ -85,12 +85,11 @@
  */
 static u32 busy_phy_map;
 
-#if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX) && \
-    (defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR))
+#if defined(CONFIG_IBM_EMAC_CLK_SEL)
 /* 405EP has "EMAC to PHY Control Register" (CPC0_EPCTL) which can help us
  * with PHY RX clock problem.
- * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX, which
- * also allows controlling each EMAC clock
+ * 440EP/440GR and 440EPx/440GRx have more sane SDR0_MFR register implementation
+ * than 440GX, which also allows controlling each EMAC clock
  */
 static inline void EMAC_RX_CLK_TX(int idx)
 {

drivers/net/ibm_emac/ibm_emac.h +11 -2

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac.h linux/drivers/net/ibm_emac/ibm_emac.h
@@ -26,7 +26,7 @@
 #if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \
     !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \
     !defined(CONFIG_440EP) && !defined(CONFIG_NP405H) && !defined(CONFIG_440SPE) && \
-    !defined(CONFIG_440GR)
+    !defined(CONFIG_440GR) && !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
 #error	"Unknown SoC. Please, check chip user manual and make sure EMAC defines are OK"
 #endif

@@ -227,9 +227,15 @@
 #define EMAC_STACR_PHYD_SHIFT		16
 #define EMAC_STACR_OC			0x00008000
 #define EMAC_STACR_PHYE			0x00004000
+#if defined(CONFIG_IBM_EMAC4V4)
+#define EMAC_STACR_STAC_MASK		0x00003800
+#define EMAC_STACR_STAC_READ		0x00001000
+#define EMAC_STACR_STAC_WRITE		0x00000800
+#else
 #define EMAC_STACR_STAC_MASK		0x00003000
 #define EMAC_STACR_STAC_READ		0x00001000
 #define EMAC_STACR_STAC_WRITE		0x00002000
+#endif
 #if !defined(CONFIG_IBM_EMAC4)
 #define EMAC_STACR_OPBC_MASK		0x00000C00
 #define EMAC_STACR_OPBC_50		0x00000000

@@ -250,8 +256,11 @@
 /*
  * For the 440SPe, AMCC inexplicably changed the polarity of
  * the "operation complete" bit in the MII control register.
+ *
+ * This change is not associated to 440SPe but to EMAC core version used in
+ * 440SPe, 440EPx, 440GRx.
  */
-#if defined(CONFIG_440SPE)
+#if defined(CONFIG_440SPE) || defined(CONFIG_IBM_EMAC4V4)
 static inline int emac_phy_done(u32 stacr)
 {
 	return !(stacr & EMAC_STACR_OC);

drivers/net/ibm_emac/ibm_emac_mal.h +1 -1

diff -ruN linux.orig/drivers/net/ibm_emac/ibm_emac_mal.h linux/drivers/net/ibm_emac/ibm_emac_mal.h
@@ -35,7 +35,7 @@
     defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_NP405H)
 #define MAL_VERSION		1
 #elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
-      defined(CONFIG_440SPE)
+      defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 #define MAL_VERSION		2
 #else
 #error "Unknown SoC, please check chip manual and choose MAL 'version'"

drivers/net/ibm_emac/ibm_emac_phy.c +63 -0

71 lines not on this page · raw message

drivers/net/Kconfig +7 -1

diff -ruN linux.orig/drivers/net/Kconfig linux/drivers/net/ibm_emac/Kconfig
@@ -1226,7 +1226,7 @@
 
 config IBM_EMAC_PHY_RX_CLK_FIX
 	bool "PHY Rx clock workaround"
-	depends on IBM_EMAC && (405EP || 440GX || 440EP || 440GR)
+	depends on IBM_EMAC && (405EP || 440GX || 440EP || 440GR || 440EPX || 440GRX)
 	help
 	  Enable this if EMAC attached to a PHY which doesn't generate
 	  RX clock if there is no link, if this is the case, you will

@@ -1235,6 +1235,12 @@
 	  
 	  If unsure, say N.
 
+config IBM_EMAC_CLK_SEL
+	bool
+	depends on IBM_EMAC_PHY_RX_CLK_FIX
+	default n if 440GX
+	default y
+
 config IBM_EMAC_DEBUG
 	bool "Debugging"
 	depends on IBM_EMAC