Fix MPC83xx SDMA setup errors
PATCH 1/1 Fix MPC83xx SDMA setup errors
Correct the alignment of the internal buffer used by the MPC83xx SDMA controller to 4Kbytes. Correct the shift direction in the logic that sets up the SDMR register for the MPC83xx SDMA controller.
--- arch/powerpc/sysdev/qe_lib/qe.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
arch/powerpc/sysdev/qe_lib/qe.c +2 -2
@@ -251,12 +251,12 @@ static int qe_sdma_init(void)/* allocate 2 internal temporary buffers (512 bytes size each) for * the SDMA */ - sdma_buf_offset =qe_muram_alloc (512 *2 ,64 ); + sdma_buf_offset =qe_muram_alloc (512 *2 ,4096 );if (IS_MURAM_ERR (sdma_buf_offset))return -ENOMEM ;out_be32 (&sdma->sdebcr, sdma_buf_offset &QE_SDEBCR_BA_MASK ); -out_be32 (&sdma->sdmr, (QE_SDMR_GLB_1_MSK | (0x1 >> +out_be32 (&sdma->sdmr, (QE_SDMR_GLB_1_MSK | (0x1 <<QE_SDMR_CEN_SHIFT )));return 0 ;
Hi Chuck,
The subject and comment of the patch is not accurate. SDMA is not a feature of MPC83xx but of QUICC Engine. That means not all 83xx has SDMA, and chip other than 83xx can have this feature. I'd suggest you change MPC83xx to QE.
- Leo
Quoted 3 lines
-----Original Message-----
From: [email protected] [mailto:[email protected]] On =
Behalf
Of Chuck
Quoted 11 lines
Meade
Sent: Tuesday, March 27, 2007 6:25 AM
To: [email protected]
Cc: [email protected]
Subject: [PATCH] Fix MPC83xx SDMA setup errors
=20
Correct the alignment of the internal buffer used by the MPC83xx SDMA controller to 4Kbytes. Correct the shift direction in the logic that sets up the SDMR register for the MPC83xx SDMA controller. =20Signed-off-by Chuck Meade <[email protected]>