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0/2: PCI MMCONFIG-related updates

PATCH In review Robert Hancock 2 participants 3 messages May 30, 2007

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PATCH 1/1 0/2: PCI MMCONFIG-related updates

These two patches implement some changes in behavior related to PCI MMCONFIG configuration space access. One changes the way in which we validate the MCFG table provided by the BIOS by checking it against ACPI motherboard resources instead of the E820 table. The BIOS is not required to reserve this area in the E820 table, so checking that results in MMCONFIG being unnecessarily disabled on some machines.

Some Intel chipsets where MMCONFIG was being disabled previously (but won't be with the first patch) had problems, not due to the MCFG table being broken, but because the access was hosed by the way in which we do PCI BAR sizing. The second patch fixes this problem.

This is requested for inclusion in the -mm tree for testing.

#1 lore raw
Quoted 7 lines · On Tuesday, May 29, 2007 9:01:22 Robert Hancock wrote:

These two patches implement some changes in behavior related to PCI MMCONFIG configuration space access. One changes the way in which we validate the MCFG table provided by the BIOS by checking it against ACPI motherboard resources instead of the E820 table. The BIOS is not required to reserve this area in the E820 table, so checking that results in MMCONFIG being unnecessarily disabled on some machines.

Quoted 6 lines

Some Intel chipsets where MMCONFIG was being disabled previously (but won't be with the first patch) had problems, not due to the MCFG table being broken, but because the access was hosed by the way in which we do PCI BAR sizing. The second patch fixes this problem.

This is requested for inclusion in the -mm tree for testing.

Robert, should we also pull in the 915 and 965 chipset specific register poking code? It might be a good sanity check against ACPI (i.e. if ACPI and the actual register window disagree, we can assume the BIOS is broken and MCFG is not safe to use). If so, I'll update and repost them against your patchset.

Thanks,
Jesse

#2 lore raw
Quoted 8 lines · Jesse Barnes
Quoted 7 lines · On Tuesday, May 29, 2007 9:01:22 Robert Hancock wrote:

These two patches implement some changes in behavior related to PCI MMCONFIG configuration space access. One changes the way in which we validate the MCFG table provided by the BIOS by checking it against ACPI motherboard resources instead of the E820 table. The BIOS is not required to reserve this area in the E820 table, so checking that results in MMCONFIG being unnecessarily disabled on some machines.

Quoted 8 lines
Quoted 6 lines

Some Intel chipsets where MMCONFIG was being disabled previously (but won't be with the first patch) had problems, not due to the MCFG table being broken, but because the access was hosed by the way in which we do PCI BAR sizing. The second patch fixes this problem.

This is requested for inclusion in the -mm tree for testing.

Robert, should we also pull in the 915 and 965 chipset specific register poking code? It might be a good sanity check against ACPI (i.e. if ACPI and the actual register window disagree, we can assume the BIOS is broken and MCFG is not safe to use). If so, I'll update and repost them against your patchset.

Probably not a bad idea..

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Robert Hancock      Saskatoon, SK, Canada
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