PPC4xx: Add and definitions for 440EPx/GRx SDRAM controller to ppc440.h
PATCH 1/4 PPC4xx: Add and definitions for 440EPx/GRx SDRAM controller to ppc440.h
This patch adds the Denali SDRAM controller definitions to "ppc440.h". It also fixes two typos in the definitions, so the board-specific "sdram.h" files containing these definitions are also fixed to avoid compiler warnings.
Signed-off-by Larry Johnson <[email protected]>
---
board/amcc/sequoia/sdram.h +2 -2
@@ -395,8 +395,8 @@#define DDR0_26_TRAS_MAX_ENCODE (n) ((((unsigned long)(n))&0xFFFF)<<16)#define DDR0_26_TRAS_MAX_DECODE (n) ((((unsigned long)(n))>>16)&0xFFFF)#define DDR0_26_TREF_MASK 0x00003FFF -#define DDR0_26_TREF_ENCODE (n) ((((unsigned long)(n))&0x3FF)<<0) -#define DDR0_26_TREF_DECODE (n) ((((unsigned long)(n))>>0)&0x3FF) +#define DDR0_26_TREF_ENCODE (n) ((((unsigned long)(n))&0x3FFF)<<0) +#define DDR0_26_TREF_DECODE (n) ((((unsigned long)(n))>>0)&0x3FFF)#define DDR0_27 0x1B#define DDR0_27_EMRS_DATA_MASK 0x3FFF0000
board/lwmon5/sdram.h +2 -2
@@ -395,8 +395,8 @@#define DDR0_26_TRAS_MAX_ENCODE (n) ((((unsigned long)(n))&0xFFFF)<<16)#define DDR0_26_TRAS_MAX_DECODE (n) ((((unsigned long)(n))>>16)&0xFFFF)#define DDR0_26_TREF_MASK 0x00003FFF -#define DDR0_26_TREF_ENCODE (n) ((((unsigned long)(n))&0x3FF)<<0) -#define DDR0_26_TREF_DECODE (n) ((((unsigned long)(n))>>0)&0x3FF) +#define DDR0_26_TREF_ENCODE (n) ((((unsigned long)(n))&0x3FFF)<<0) +#define DDR0_26_TREF_DECODE (n) ((((unsigned long)(n))>>0)&0x3FFF)#define DDR0_27 0x1B#define DDR0_27_EMRS_DATA_MASK 0x3FFF0000
include/ppc440.h +466 -48
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