Can't patch linux-2.6.20.21 with adeos-ipipe-2.6.20-i386-1.10-10.patch - xenomai 2.3.4
Subsystems (13)
I tried to patch the linux-2.6.20.21 with adeos-ipipe-2.6.20-i386-1.10-10.patch without success.
There my prepare:
[[email protected] linux-2.6.20.21]# linux_tree=/usr/src/kernels/linux-2.6.20.21 [[email protected] linux-2.6.20.21]# xenomai_root=/home/dennisn/work/ethercat/xenomai-2.3.4/ [[email protected] linux-2.6.20.21]# xenomai_root=/home/dennisn/work/ethercat/xenomai-2.3.4 [[email protected] linux-2.6.20.21]# adeos_patch=/home/dennisn/Download/adeos-ipipe-2.6.20-i386-1.10-10.patch [[email protected] linux-2.6.20.21]# cd $xenomai_root
[[email protected] xenomai-2.3.4]# scripts/prepare-kernel.sh --arch=i386 --adeos=$adeos_patch --linux=$linux_tree
These are error:
patching file arch/i386/kernel/entry.S
Hunk #9 FAILED at 426.
1 out of 29 hunks FAILED -- saving rejects to file arch/i386/kernel/entry.S.rej patching file mm/vmalloc.cprepare-kernel.sh: Unable to patch kernel 2.6.20.21 with adeos-ipipe-2.6.20-i386-1.10-10.patch.
I found out that the adeos patches only worked with kernel upto linux-2.6.20.10. Any suggestion please.
Thanks,
Dennis
Quoted 2 lines · Dennis Nguyen
I tried to patch the linux-2.6.20.21 with adeos-ipipe-2.6.20-i386-1.10-10.patch without success.
Attached is an updated patch.
Philippe, we should move the base over recent 2.6.20. Hardly anyone will want to use the early .20 releases after so many bug fixes in this series.
Jan
Signature · 2 lines
Siemens AG, Corporate Technology, CT SE 2 Corporate Competence Center Embedded Linux
Makefile +4 -0
@@ -490,6 +490,10 @@ endif include $(srctree)/arch/$(ARCH)/Makefile +ifdef CONFIG_IPIPE_TRACE_MCOUNT +CFLAGS += -pg +endif + ifdef CONFIG_FRAME_POINTER CFLAGS += -fno-omit-frame-pointer $(call cc-option,-fno-optimize-sibling-calls,) else
arch/i386/Kconfig +3 -1
@@ -190,7 +190,7 @@ endchoice config PARAVIRT bool "Paravirtualization support (EXPERIMENTAL)" depends on EXPERIMENTAL - depends on !(X86_VISWS || X86_VOYAGER) + depends on !(X86_VISWS || X86_VOYAGER || IPIPE) help Paravirtualization is a way of running multiple instances of Linux on the same machine, under a hypervisor. This option
@@ -277,6 +277,8 @@ config SCHED_MC source "kernel/Kconfig.preempt" +source "kernel/ipipe/Kconfig" + config X86_UP_APIC bool "Local APIC support on uniprocessors" depends on !SMP && !(X86_VISWS || X86_VOYAGER || X86_GENERICARCH)
arch/i386/boot/compressed/Makefile +1 -0
@@ -9,6 +9,7 @@ targets := vmlinux vmlinux.bin vmlinux. EXTRA_AFLAGS := -traditional LDFLAGS_vmlinux := -T +CFLAGS := $(subst -pg,,$(CFLAGS)) CFLAGS_misc.o += -fPIC hostprogs-y := relocs
arch/i386/boot/compressed/misc.c +7 -1
@@ -23,6 +23,12 @@* This means that it is not safe to place pointers in static structures. */ +#ifdef CONFIG_IPIPE_TRACE_MCOUNT +void __attribute__ ((no_instrument_function))mcount (void ) +{ +} +#endif +/* * Getting to provable safe in place decompression is hard. * Worst case behaviours need to be analized.
@@ -189,7 +195,7 @@ static void putstr(const char *);static unsigned long free_mem_ptr;static unsigned long free_mem_end_ptr; -#define HEAP_SIZE 0x3000 +#define HEAP_SIZE 0x4000static char *vidmem = (char *)0xb8000 ;static int vidport;
arch/i386/kernel/Makefile +2 -0
@@ -31,6 +31,8 @@ obj-$(CONFIG_X86_SUMMIT_NUMA) += summit. obj-$(CONFIG_KPROBES) += kprobes.o obj-$(CONFIG_MODULES) += module.o obj-y += sysenter.o vsyscall.o +obj-$(CONFIG_IPIPE) += ipipe.o +obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o obj-$(CONFIG_ACPI_SRAT) += srat.o obj-$(CONFIG_HPET_TIMER) += time_hpet.o obj-$(CONFIG_EFI) += efi.o efi_stub.o
arch/i386/kernel/apic.c +18 -12
@@ -102,7 +102,7 @@ void ack_bad_irq(unsigned int irq)* But only ack when the APIC is enabled -AK */ if (cpu_has_apic) -ack_APIC_irq (); +__ack_APIC_irq (); }void __init apic_intr_init (void )
@@ -121,6 +121,12 @@ void __init apic_intr_init(void)#ifdef CONFIG_X86_MCE_P4THERMAL set_intr_gate (THERMAL_APIC_VECTOR , thermal_interrupt);#endif +#ifdef CONFIG_IPIPE +set_intr_gate (IPIPE_SERVICE_VECTOR0 , ipipe_ipi0); +set_intr_gate (IPIPE_SERVICE_VECTOR1 , ipipe_ipi1); +set_intr_gate (IPIPE_SERVICE_VECTOR2 , ipipe_ipi2); +set_intr_gate (IPIPE_SERVICE_VECTOR3 , ipipe_ipi3); +#endif }/* Using APIC to generate smp_local_timer_interrupt? */
@@ -615,13 +621,13 @@ void lapic_shutdown(void)if (!cpu_has_apic)return ; -local_irq_save (flags); +local_irq_save_hw (flags);clear_local_APIC ();if (enabled_via_apicbase)disable_local_APIC (); -local_irq_restore (flags); +local_irq_restore_hw (flags); }#ifdef CONFIG_PM
@@ -672,9 +678,9 @@ static int lapic_suspend(struct sys_devi apic_pm_state.apic_thmr =apic_read (APIC_LVTTHMR );#endif -local_irq_save (flags); +local_irq_save_hw (flags);disable_local_APIC (); -local_irq_restore (flags); +local_irq_restore_hw (flags);return 0 ; }
@@ -689,7 +695,7 @@ static int lapic_resume(struct sys_devic maxlvt =get_maxlvt (); -local_irq_save (flags); +local_irq_save_hw (flags);/* * Make sure the APICBASE points to the right address
@@ -724,7 +730,7 @@ static int lapic_resume(struct sys_devicapic_write (APIC_LVTERR , apic_pm_state.apic_lvterr);apic_write (APIC_ESR ,0 );apic_read (APIC_ESR ); -local_irq_restore (flags); +local_irq_restore_hw (flags);return 0 ; }
@@ -1020,7 +1026,7 @@ static void __devinit setup_APIC_timer(u {unsigned long flags; -local_irq_save (flags); +local_irq_save_hw (flags);/* * Wait for IRQ0's slice:
@@ -1029,7 +1035,7 @@ static void __devinit setup_APIC_timer(u__setup_APIC_LVTT (clocks); -local_irq_restore (flags); +local_irq_restore_hw (flags); }/*
@@ -1119,7 +1125,7 @@ void __init setup_boot_APIC_clock(void)apic_printk (APIC_VERBOSE ,"Using local APIC timer interrupts.\n" ); using_apic_timer =1 ; -local_irq_save (flags); +local_irq_save_hw (flags); calibration_result =calibrate_APIC_clock ();/*
@@ -1127,7 +1133,7 @@ void __init setup_boot_APIC_clock(void)*/ setup_APIC_timer (calibration_result); -local_irq_restore (flags); +local_irq_restore_hw (flags); }void __devinit setup_secondary_APIC_clock (void )
@@ -1313,7 +1319,7 @@ fastcall void smp_spurious_interrupt(str*/ v =apic_read (APIC_ISR + ((SPURIOUS_APIC_VECTOR & ~0x1f ) >>1 ));if (v & (1 << (SPURIOUS_APIC_VECTOR &0x1f ))) -ack_APIC_irq (); +__ack_APIC_irq ();/* see sw-dev-man vol 3, chapter 7.4.13.5 */ printk(KERN_INFO "spurious APIC interrupt on CPU#%d, should never happen.\n",
arch/i386/kernel/entry.S +134 -23
378 lines not on this page · raw message
arch/i386/kernel/i8253.c +7 -1
@@ -16,7 +16,7 @@#include "io_ports.h" -DEFINE_SPINLOCK (i8253_lock); +IPIPE_DEFINE_SPINLOCK (i8253_lock);EXPORT_SYMBOL (i8253_lock);void setup_pit_timer (void )
@@ -45,6 +45,12 @@ static cycle_t pit_read(void)static int old_count;static u32 old_jifs; +#ifdef CONFIG_IPIPE +if (!__ipipe_pipeline_head_p (ipipe_root_domain)) +/* We don't really own the PIT. */ +return (cycle_t)(jiffies *LATCH ) + (LATCH -1 ) - old_count; +#endif /* CONFIG_IPIPE */ +spin_lock_irqsave (&i8253_lock, flags);/* * Although our caller may have the read side of xtime_lock,
arch/i386/kernel/i8259.c +20 -7
@@ -35,7 +35,7 @@*/ static int i8259A_auto_eoi; -DEFINE_SPINLOCK (i8259A_lock); +IPIPE_DEFINE_SPINLOCK (i8259A_lock);static void mask_and_ack_8259A (unsigned int );static struct irq_chip i8259A_chip = {
@@ -71,6 +71,7 @@ void disable_8259A_irq(unsigned int irq)unsigned long flags;spin_lock_irqsave (&i8259A_lock, flags); +ipipe_irq_lock (irq); cached_irq_mask |= mask;if (irq &8 )outb (cached_slave_mask,PIC_SLAVE_IMR );
@@ -81,15 +82,18 @@ void disable_8259A_irq(unsigned int irq)void enable_8259A_irq (unsigned int irq) { -unsigned int mask = ~(1 << irq); +unsigned int mask = (1 << irq);unsigned long flags;spin_lock_irqsave (&i8259A_lock, flags); - cached_irq_mask &= mask; -if (irq &8 ) -outb (cached_slave_mask,PIC_SLAVE_IMR ); -else -outb (cached_master_mask,PIC_MASTER_IMR ); +if (cached_irq_mask & mask) { + cached_irq_mask &= ~mask; +if (irq &8 ) +outb (cached_slave_mask,PIC_SLAVE_IMR ); +else +outb (cached_master_mask,PIC_MASTER_IMR ); +ipipe_irq_unlock (irq); + }spin_unlock_irqrestore (&i8259A_lock, flags); }
@@ -170,6 +174,15 @@ static void mask_and_ack_8259A(unsigned*/ if (cached_irq_mask & irqmask) goto spurious_8259A_irq; +#ifdef CONFIG_IPIPE +if (irq ==0 ) { +/* Fast timer ack -- don't mask (unless supposedly +spurious) */ +outb (0x60 ,PIC_MASTER_CMD ); +spin_unlock_irqrestore (&i8259A_lock, flags); +return ; + } +#endif /* CONFIG_IPIPE */ cached_irq_mask |= irqmask; handle_real_irq:
arch/i386/kernel/io_apic.c +55 -8
153 lines not on this page · raw message
arch/i386/kernel/ipipe.c new file +831 -0
831 lines not on this page · raw message
arch/i386/kernel/mcount.S new file +32 -0
@@ -0,0 +1,32 @@ +/* + * linux/arch/i386/mcount.S + * + * Copyright (C) 2005, 2007 Jan Kiszka + */ + +.globl mcount +mcount: + cmpl $0,ipipe_trace_enable + je out + + pushl %ebp + movl %esp,%ebp + + pushl %eax + pushl %ecx + pushl %edx + + pushl $0 # no additional value (v) + movl (%ebp),%eax + movl 0x4(%ebp),%edx # __CALLER_ADDR0 + movl 0x4(%eax),%ecx # __CALLER_ADDR1 + movl $0,%eax # IPIPE_TRACE_FUNC + call __ipipe_trace + popl %eax + + popl %edx + popl %ecx + popl %eax + popl %ebp +out: + ret
arch/i386/kernel/nmi.c +5 -3
@@ -75,6 +75,10 @@ static int unknown_nmi_panic_callback(stextern void show_registers (struct pt_regs *regs);extern int unknown_nmi_panic; +static int default_nmi_watchdog_tick (struct pt_regs * regs,unsigned reason); + +int (*nmi_watchdog_tick) (struct pt_regs * regs,unsigned reason) = &default_nmi_watchdog_tick; +EXPORT_SYMBOL (nmi_watchdog_tick);/* converts an msr to an appropriate reservation bit */ static inline unsigned int nmi_perfctr_msr_to_bit (unsigned int msr)
@@ -882,9 +886,7 @@ void touch_nmi_watchdog (void) }EXPORT_SYMBOL (touch_nmi_watchdog); -extern void die_nmi (struct pt_regs *,const char *msg); - -__kprobes int nmi_watchdog_tick (struct pt_regs * regs,unsigned reason) +static __kprobes int default_nmi_watchdog_tick (struct pt_regs * regs,unsigned reason) {/*
arch/i386/kernel/process.c +2 -1
@@ -189,6 +189,7 @@ void cpu_idle(void)play_dead ();__get_cpu_var (irq_stat).idle_timestamp = jiffies; +ipipe_suspend_domain ();idle (); }preempt_enable_no_resched ();
@@ -635,7 +636,7 @@ struct task_struct fastcall * __switch_t {struct thread_struct *prev = &prev_p->thread, *next = &next_p->thread; -int cpu =smp_processor_id (); +int cpu =raw_smp_processor_id ();struct tss_struct *tss = &per_cpu (init_tss, cpu);/* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
arch/i386/kernel/smp.c +23 -5
@@ -142,6 +142,9 @@ void __send_IPI_shortcut(unsigned int sh* to the APIC. */ unsigned int cfg; +unsigned long flags; + +local_irq_save_hw_cond (flags);/* * Wait for idle.
@@ -157,6 +160,8 @@ void __send_IPI_shortcut(unsigned int sh* Send the IPI. The write to APIC_ICR fires this off. */ apic_write_around (APIC_ICR , cfg); + +local_irq_restore_hw_cond (flags); } void fastcall send_IPI_self(int vector)
@@ -173,7 +178,7 @@ void send_IPI_mask_bitmask(cpumask_t cpuunsigned long cfg;unsigned long flags; -local_irq_save (flags); +local_irq_save_hw (flags);WARN_ON (mask & ~cpus_addr (cpu_online_map)[0 ]);/* * Wait for idle.
@@ -196,7 +201,7 @@ void send_IPI_mask_bitmask(cpumask_t cpu*/ apic_write_around (APIC_ICR , cfg); -local_irq_restore (flags); +local_irq_restore_hw (flags); }void send_IPI_mask_sequence (cpumask_t mask,int vector)
@@ -210,7 +215,7 @@ void send_IPI_mask_sequence(cpumask_t ma* should be modified to do 1 message per cluster ID - mbligh */ -local_irq_save (flags); +local_irq_save_hw (flags);for (query_cpu =0 ; query_cpu <NR_CPUS ; ++query_cpu) {if (cpu_isset (query_cpu, mask)) {
@@ -237,7 +242,7 @@ void send_IPI_mask_sequence(cpumask_t maapic_write_around (APIC_ICR , cfg); } } -local_irq_restore (flags); +local_irq_restore_hw (flags); }#include <mach_ipi.h> /* must come after the send_IPI functions above for inlining */
@@ -321,7 +326,9 @@ static inline void leave_mm (unsigned lo fastcall void smp_invalidate_interrupt(struct pt_regs *regs) { -unsigned long cpu; +unsigned long cpu, flags; + +local_irq_save_hw_cond (flags); cpu =get_cpu ();
@@ -351,6 +358,7 @@ fastcall void smp_invalidate_interrupt(ssmp_mb__after_clear_bit (); out:put_cpu_no_resched (); +local_irq_restore_hw_cond (flags); } static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
@@ -411,14 +419,19 @@ void flush_tlb_current_task(void) {struct mm_struct *mm = current->mm;cpumask_t cpu_mask; +unsigned long flags;preempt_disable (); +local_irq_save_hw_cond (flags); + cpu_mask = mm->cpu_vm_mask;cpu_clear (smp_processor_id (), cpu_mask);local_flush_tlb ();if (!cpus_empty (cpu_mask))flush_tlb_others (cpu_mask, mm,FLUSH_ALL ); + +local_irq_restore_hw_cond (flags);preempt_enable (); }
@@ -446,8 +459,11 @@ void flush_tlb_page(struct vm_area_struc {struct mm_struct *mm = vma->vm_mm;cpumask_t cpu_mask; +unsigned long flags;preempt_disable (); +local_irq_save_hw_cond (flags); + cpu_mask = mm->cpu_vm_mask;cpu_clear (smp_processor_id (), cpu_mask);
@@ -458,6 +474,8 @@ void flush_tlb_page(struct vm_area_strucleave_mm (smp_processor_id ()); } +local_irq_restore_hw_cond (flags); +if (!cpus_empty (cpu_mask))flush_tlb_others (cpu_mask, mm, va);
arch/i386/kernel/smpboot.c +5 -0
@@ -1508,6 +1508,11 @@ void __init smp_intr_init(void)/* IPI for generic function call */ set_intr_gate (CALL_FUNCTION_VECTOR , call_function_interrupt); + +#ifdef CONFIG_IPIPE +/* IPI for critical lock */ +set_intr_gate (IPIPE_CRITICAL_VECTOR , ipipe_ipiX); +#endif }/*
arch/i386/kernel/time.c +3 -2
@@ -178,11 +178,12 @@ irqreturn_t timer_interrupt(int irq, voi* This will also deassert NMI lines for the watchdog if run * on an 82489DX-based system. */ -spin_lock (&i8259A_lock); +unsigned long flags; +spin_lock_irqsave_cond (&i8259A_lock,flags);outb (0x0c ,PIC_MASTER_OCW3 );/* Ack the IRQ; AEOI will end it automatically. */ inb (PIC_MASTER_POLL ); - spin_unlock(&i8259A_lock); + spin_unlock_irqrestore_cond(&i8259A_lock,flags); }#endif
arch/i386/kernel/traps.c +15 -1
@@ -315,6 +315,11 @@ void show_registers(struct pt_regs *regs regs->esi, regs->edi, regs->ebp, esp);printk (KERN_EMERG "ds: %04x es: %04x ss: %04x\n" , regs->xds &0xffff , regs->xes &0xffff , ss); +#ifdef CONFIG_IPIPE +if (ipipe_current_domain != ipipe_root_domain) +printk ("I-pipe domain %s" ,ipipe_current_domain->name); + else +#endif /* CONFIG_IPIPE */ printk (KERN_EMERG "Process %.*s (pid: %d, ti=%p task=%p task.ti=%p)" ,TASK_COMM_LEN , current->comm, current->pid,current_thread_info (), current, current->thread_info);
@@ -713,6 +718,8 @@ void __kprobes die_nmi(struct pt_regs *rdo_exit (SIGSEGV ); } +EXPORT_SYMBOL (die_nmi); +static __kprobes void default_do_nmi (struct pt_regs * regs) {unsigned char reason =0 ;
@@ -757,7 +764,11 @@ fastcall __kprobes void do_nmi(struct ptnmi_enter (); +#ifdef CONFIG_IPIPE + cpu =ipipe_processor_id (); +#else /* !CONFIG_IPIPE */ cpu =smp_processor_id (); +#endif /* !CONFIG_IPIPE */ ++nmi_count (cpu);
@@ -1046,13 +1057,16 @@ asmlinkage void math_state_restore(void) {struct thread_info *thread =current_thread_info ();struct task_struct *tsk = thread->task; - +unsigned long flags; + +local_irq_save_hw_cond (flags);clts ();/* Allow maths ops (or we recurse) */ if (!tsk_used_math (tsk))init_fpu (tsk);restore_fpu (tsk); thread->status |=TS_USEDFPU ;/* So we fnsave on switch_to() */ tsk->fpu_counter++; +local_irq_restore_hw_cond (flags); }#ifndef CONFIG_MATH_EMULATION
arch/i386/lib/mmx.c +1 -1
@@ -31,7 +31,7 @@ void *_mmx_memcpy(void *to, const void *void *p;int i; -if (unlikely (in_interrupt ())) +if (unlikely (!ipipe_root_domain_p ||in_interrupt ()))return __memcpy (to, from, len); p = to;
arch/i386/mach-generic/bigsmp.c +1 -0
@@ -14,6 +14,7 @@#include <linux/smp.h> #include <linux/init.h> #include <linux/dmi.h> +#include <linux/ipipe.h> #include <asm/mach-bigsmp/mach_apic.h> #include <asm/mach-bigsmp/mach_apicdef.h> #include <asm/mach-bigsmp/mach_ipi.h>
arch/i386/mach-generic/default.c +1 -0
@@ -13,6 +13,7 @@#include <linux/string.h> #include <linux/smp.h> #include <linux/init.h> +#include <linux/ipipe.h> #include <asm/mach-default/mach_apic.h> #include <asm/mach-default/mach_ipi.h> #include <asm/mach-default/mach_mpparse.h>
arch/i386/mach-generic/es7000.c +1 -0
@@ -13,6 +13,7 @@#include <linux/string.h> #include <linux/smp.h> #include <linux/init.h> +#include <linux/ipipe.h> #include <asm/mach-es7000/mach_apicdef.h> #include <asm/mach-es7000/mach_apic.h> #include <asm/mach-es7000/mach_ipi.h>
arch/i386/mach-generic/summit.c +1 -0
@@ -13,6 +13,7 @@#include <linux/string.h> #include <linux/smp.h> #include <linux/init.h> +#include <linux/ipipe.h> #include <asm/mach-summit/mach_apic.h> #include <asm/mach-summit/mach_apicdef.h> #include <asm/mach-summit/mach_ipi.h>
arch/i386/mach-visws/visws_apic.c +1 -2
@@ -29,7 +29,7 @@#include "irq_vectors.h" -static DEFINE_SPINLOCK (cobalt_lock); +static IPIPE_DEFINE_SPINLOCK (cobalt_lock);/* * Set the given Cobalt APIC Redirection Table entry to point
@@ -132,7 +132,6 @@ static struct irq_chip cobalt_irq_type = .end = end_cobalt_irq, }; -/* * This is the PIIX4-based 8259 that is wired up indirectly to Cobalt * -- not the manner expected by the code in i8259.c.
arch/i386/mach-voyager/voyager_basic.c +4 -4
@@ -185,20 +185,20 @@ voyager_timer_interrupt(void)* pointy. */ __u16 val; -spin_lock (&i8253_lock); +spin_lock_irqsave (&i8253_lock);outb_p (0x00 ,0x43 ); val =inb_p (0x40 ); val |=inb (0x40 ) <<8 ; -spin_unlock (&i8253_lock); +spin_unlock_irqrestore (&i8253_lock);if (val >LATCH ) {printk ("\nVOYAGER: countdown timer value too high (%d), resetting\n\n" , val); -spin_lock (&i8253_lock); +spin_lock_irqsave (&i8253_lock);outb (0x34 ,0x43 );outb_p (LATCH &0xff ,0x40 );/* LSB */ outb (LATCH >>8 ,0x40 );/* MSB */ -spin_unlock (&i8253_lock); +spin_unlock_irqrestore (&i8253_lock); } }#ifdef CONFIG_SMP
arch/i386/mm/fault.c +26 -0
@@ -23,6 +23,7 @@#include <linux/module.h> #include <linux/kprobes.h> #include <linux/uaccess.h> +#include <linux/ipipe_trace.h> #include <asm/system.h> #include <asm/desc.h>
@@ -68,9 +69,13 @@ void bust_spinlocks(int yes)int loglevel_save = console_loglevel;if (yes) { +ipipe_trace_panic_freeze (); oops_in_progress =1 ;return ; } + +ipipe_trace_panic_dump (); +#ifdef CONFIG_VT unblank_screen ();#endif
@@ -333,6 +338,8 @@ fastcall void __kprobes do_page_fault(st/* get the address */ address =read_cr2 (); +local_irq_enable_hw_cond (); + tsk = current; si_code =SEGV_MAPERR ;
@@ -652,3 +659,22 @@ void vmalloc_sync_all(void) } }#endif + +#ifdef CONFIG_IPIPE +void __ipipe_pin_range_globally (unsigned long start,unsigned long end) +{ +unsigned long next, addr = start; + +do { +unsigned long flags; +struct page *page; + + next =pgd_addr_end (addr, end); +spin_lock_irqsave (&pgd_lock, flags); +for (page = pgd_list; page; page = (struct page *)page->index) +vmalloc_sync_one (page_address (page), addr); +spin_unlock_irqrestore (&pgd_lock, flags); + + }while (addr = next, addr != end); +} +#endif /* CONFIG_IPIPE */
drivers/pci/htirq.c +1 -1
@@ -21,7 +21,7 @@* With multiple simultaneous hypertransport irq devices it might pay * to make this more fine grained. But start with simple, stupid, and correct. */ -static DEFINE_SPINLOCK (ht_irq_lock); +static IPIPE_DEFINE_SPINLOCK (ht_irq_lock);struct ht_irq_cfg {struct pci_dev *dev;
include/asm-i386/apic.h +6 -0
@@ -80,7 +80,13 @@ int get_physical_broadcast(void);# define apic_write_around (x,y) apic_write_atomic((x),(y))#endif +#ifdef CONFIG_IPIPE +#define ack_APIC_irq () do { } while(0) +static inline void __ack_APIC_irq(void) +#else /* !CONFIG_IPIPE */ +#define __ack_APIC_irq () ack_APIC_irq() static inline void ack_APIC_irq(void) +#endif /* CONFIG_IPIPE */ {/* * ack_APIC_irq() actually gets compiled as a single instruction:
include/asm-i386/hw_irq.h +7 -0
@@ -40,6 +40,13 @@ fastcall void error_interrupt(void); fastcall void spurious_interrupt(void); fastcall void thermal_interrupt(void);#define platform_legacy_irq (irq) ((irq) < 16) +#ifdef CONFIG_IPIPE +fastcall void ipipe_ipi0(void); +fastcall void ipipe_ipi1(void); +fastcall void ipipe_ipi2(void); +fastcall void ipipe_ipi3(void); +fastcall void ipipe_ipiX(void); +#endif #endif void disable_8259A_irq (unsigned int irq);
include/asm-i386/i387.h +5 -4
@@ -75,10 +75,11 @@ static inline void __save_init_fpu( stru }#define __unlazy_fpu ( tsk ) do { \ - if (task_thread_info(tsk)->status & TS_USEDFPU) \ - save_init_fpu( tsk ); \ - else \ - tsk->fpu_counter = 0; \ + if (task_thread_info(tsk)->status & TS_USEDFPU) { \ + __save_init_fpu(tsk); \ + stts(); \ + } else \ + tsk->fpu_counter = 0; \ } while (0)#define __clear_fpu ( tsk ) \
include/asm-i386/i8253.h +1 -1
@@ -1,6 +1,6 @@#ifndef __ASM_I8253_H__#define __ASM_I8253_H__ -extern spinlock_t i8253_lock; +extern ipipe_spinlock_t i8253_lock;#endif /* __ASM_I8253_H__ */
include/asm-i386/i8259.h +1 -1
@@ -7,7 +7,7 @@ extern unsigned int cached_irq_mask;#define cached_master_mask (__byte(0, cached_irq_mask))#define cached_slave_mask (__byte(1, cached_irq_mask)) -extern spinlock_t i8259A_lock; +extern ipipe_spinlock_t i8259A_lock;extern void init_8259A (int auto_eoi);extern void enable_8259A_irq (unsigned int irq);
include/asm-i386/ipipe.h new file +201 -0
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include/asm-i386/ipipe_base.h new file +185 -0
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include/asm-i386/irqflags.h +124 -3
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include/asm-i386/mach-default/do_timer.h +3 -2
@@ -50,14 +50,15 @@ static inline void do_timer_interrupt_hostatic inline int do_timer_overflow (int count) {int i; +unsigned long flags; -spin_lock (&i8259A_lock); +spin_lock_irqsave (&i8259A_lock, flags);/* * This is tricky when I/O APICs are used; * see do_timer_interrupt(). */ i =inb (0x20 ); -spin_unlock (&i8259A_lock); +spin_unlock_irqrestore (&i8259A_lock, flags);/* assumption about timer being IRQ0 */ if (i &0x01 ) {
include/asm-i386/mmu_context.h +6 -1
@@ -66,6 +66,11 @@ static inline void switch_mm(struct mm_s asm("movl %0,%%fs" : :"r" (0 ));#define activate_mm (prev, next) \ - switch_mm((prev),(next),NULL) +do { \ + unsigned long flags; \ + local_irq_save_hw_cond(flags); \ + switch_mm((prev),(next),NULL); \ + local_irq_restore_hw_cond(flags); \ +} while(0)#endif
include/asm-i386/nmi.h +2 -1
@@ -29,7 +29,8 @@ extern void setup_apic_nmi_watchdog (voiextern void stop_apic_nmi_watchdog (void *);extern void disable_timer_nmi_watchdog (void );extern void enable_timer_nmi_watchdog (void ); -extern int nmi_watchdog_tick (struct pt_regs * regs,unsigned reason); +extern int (*nmi_watchdog_tick)(struct pt_regs * regs,unsigned reason); +extern void die_nmi (struct pt_regs *,const char *msg);extern atomic_t nmi_active;extern unsigned int nmi_watchdog;
include/asm-i386/spinlock.h +1 -1
@@ -54,7 +54,7 @@ static inline void __raw_spin_lock(raw_s* NOTE: there's an irqs-on section here, which normally would have to be * irq-traced, but on CONFIG_TRACE_IRQFLAGS we never use this variant. */ -#ifndef CONFIG_PROVE_LOCKING +#if !defined(CONFIG_PROVE_LOCKING ) && !defined(CONFIG_IPIPE )static inline void __raw_spin_lock_flags (raw_spinlock_t *lock,unsigned long flags) { asm volatile(
include/linux/hardirq.h +2 -2
@@ -128,7 +128,7 @@ static inline void account_system_vtime(*/ extern void irq_exit (void ); -#define nmi_enter () do { lockdep_off(); irq_enter(); } while (0) -#define nmi_exit () do { __irq_exit(); lockdep_on(); } while (0) +#define nmi_enter () do { if (ipipe_root_domain_p) { lockdep_off(); irq_enter(); } } while (0) +#define nmi_exit () do { if (ipipe_root_domain_p) { __irq_exit(); lockdep_on(); } } while (0)#endif /* LINUX_HARDIRQ_H */
include/linux/ipipe.h new file +554 -0
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include/linux/ipipe_base.h new file +77 -0
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include/linux/ipipe_compat.h new file +54 -0
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include/linux/ipipe_percpu.h new file +69 -0
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include/linux/ipipe_trace.h new file +65 -0
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include/linux/spinlock.h +120 -13
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kernel/ipipe/Kconfig.debug new file +88 -0
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kernel/ipipe/core.c new file +1513 -0
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kernel/ipipe/tracer.c new file +1362 -0
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kernel/irq/chip.c +128 -0
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kernel/printk.c +78 -0
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kernel/sched.c +64 -3
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mm/memory.c +177 -33
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