discard MSR writes
PATCH 1/1 discard MSR writes
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later. Qemu currently also discards those writes.
drivers/kvm/svm.c +6 -0
@@ -1143,6 +1143,12 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)case MSR_SYSCALL_MASK : svm->vmcb->save.sfmask = data;break ; +case MSR_K7_EVNTSEL0 : +case MSR_K7_EVNTSEL1 : +case MSR_K7_EVNTSEL2 : +case MSR_K7_EVNTSEL3 : +/* discard those writes for now, required by vista 64bit */ +break ;#endif case MSR_IA32_SYSENTER_CS : svm->vmcb->save.sysenter_cs = data;
-------------------------------------------------------------------------
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005.
http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
_______________________________________________
kvm-devel mailing list [email protected]
https://lists.sourceforge.net/lists/listinfo/kvm-devel
Quoted 4 lines · On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.
Won't this make the corresponding rdmsrs fail? What happens when the rdmsr returns an error, but windows then uses some garbage value (as it thinks the wrmsr succeeded, so the rdmsr also should)?
-------------------------------------------------------------------------
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005.
http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 14 lines · Markus Rechberger
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.Signed-off-by Joerg Roedel <[email protected]>Signed-off-by Markus Rechberger <[email protected]>drivers/kvm/svm.c +0
-0@@ -1143,6 +1143,12 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)case MSR_SYSCALL_MASK : svm->vmcb->save.sfmask = data;
drivers/kvm/svm.c static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) · line 1154
Quoted 10 lines
drivers/kvm/svm.c +6
-0break ; +case MSR_K7_EVNTSEL0 : +case MSR_K7_EVNTSEL1 : +case MSR_K7_EVNTSEL2 : +case MSR_K7_EVNTSEL3 : +/* discard those writes for now, required by vista 64bit */ +break ;#endif case MSR_IA32_SYSENTER_CS : svm->vmcb->save.sysenter_cs = data;
What value is actually written into those MSRs? If the value causes the counter to be disabled (e.g. the interrupt enabled bit is cleared) we can be more clever: discard the write if it disables interrupts, and print a message and return -ESOMETHING if it enables interrupts. This way, if some other guest depends on the performance counters, we'll have some indication that something is wrong.
btw, is this Vista x86 or x64?
Signature · 7 lines
error compiling committee.c: too many arguments to function ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 8 lines · Amit Shah
Quoted 5 lines · On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.
Quoted 4 lines
Won't this make the corresponding rdmsrs fail? What happens when the rdmsr returns an error, but windows then uses some garbage value (as it thinks the wrmsr succeeded, so the rdmsr also should)?
rdmsr will inject #GP for these msrs. Implementing set_msr() doesn't affect rdmsr.
Signature · 7 lines
error compiling committee.c: too many arguments to function ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 7 lines · On Tuesday 20 November 2007 15:17:54 Avi Kivity wrote:
Quoted 6 lines · Amit Shah
Quoted 4 lines · On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.
Quoted 8 lines
Quoted 3 lines
Won't this make the corresponding rdmsrs fail? What happens when the rdmsr returns an error, but windows then uses some garbage value (as it thinks the wrmsr succeeded, so the rdmsr also should)?
rdmsr will inject #GP for these msrs. Implementing
set_msr()doesn't affect rdmsr.From the AMD programming manual, vol 2:
The performance event-select registers can be read and written only by system software running at CPL = 0 using the RDMSR and WRMSR instructions, respectively. Any attempt to read or write these registers at CPL > 0 causes a general-protection exception to occur.
Also, a grep through the Linux code shows a rdmsrl on EVNTSEL3.
-------------------------------------------------------------------------
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005.
http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 19 lines · Amit Shah
Quoted 16 lines · On Tuesday 20 November 2007 15:17:54 Avi Kivity wrote:
Quoted 11 lines · Amit Shah
Quoted 5 lines · On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.Won't this make the corresponding rdmsrs fail? What happens when the rdmsr returns an error, but windows then uses some garbage value (as it thinks the wrmsr succeeded, so the rdmsr also should)?
rdmsr will inject #GP for these msrs. Implementing
set_msr()doesn't affect rdmsr.
Quoted 7 lines
Quoted 1 line
From the AMD programming manual, vol 2:
The performance event-select registers can be read and written only by system software running at CPL = 0 using the RDMSR and WRMSR instructions, respectively. Any attempt to read or write these registers at CPL > 0 causes a general-protection exception to occur.
Look through the code that implements rdmsr, it doesn't care about the manuals and will happily inject a #GP for rdmsr of any unimplemented msr (like PerfEvtSel) wrmsr and rdmsr implementations are not linked.
Signature · 7 lines
error compiling committee.c: too many arguments to function ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 18 lines · On Tuesday 20 November 2007 15:42:35 Avi Kivity wrote:
Quoted 17 lines · Amit Shah
Quoted 15 lines · On Tuesday 20 November 2007 15:17:54 Avi Kivity wrote:
Quoted 9 lines · Amit Shah
Quoted 4 lines · On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.Won't this make the corresponding rdmsrs fail? What happens when the rdmsr returns an error, but windows then uses some garbage value (as it thinks the wrmsr succeeded, so the rdmsr also should)?
rdmsr will inject #GP for these msrs. Implementing
set_msr()doesn't affect rdmsr.From the AMD programming manual, vol 2:
Quoted 8 lines
Quoted 4 lines
The performance event-select registers can be read and written only by system software running at CPL = 0 using the RDMSR and WRMSR instructions, respectively. Any attempt to read or write these registers at CPL > 0 causes a general-protection exception to occur.
Look through the code that implements rdmsr, it doesn't care about the manuals and will happily inject a #GP for rdmsr of any unimplemented msr (like PerfEvtSel) wrmsr and rdmsr implementations are not linked.
That's right; but isn't that wrong if we cause it? I mean if we just allow the wrmsr access to go through (and if they're actually used, not disabled as you mentioned separately), then there'll be no interrupts when the guest expects them to occur, or the rdmsr will fail, when the guest thinks it shouldn't have.
I guess we're putting forth the same point: if the wrmsr is not for disabling interrupts, we shouldn't let it go through, or just implement the required emulation.
-------------------------------------------------------------------------
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005.
http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 35 lines · Amit Shah
Quoted 23 lines · On Tuesday 20 November 2007 15:42:35 Avi Kivity wrote:
Quoted 21 lines · Amit Shah
Quoted 18 lines · On Tuesday 20 November 2007 15:17:54 Avi Kivity wrote:
Quoted 11 lines · Amit Shah
Quoted 5 lines · On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.Won't this make the corresponding rdmsrs fail? What happens when the rdmsr returns an error, but windows then uses some garbage value (as it thinks the wrmsr succeeded, so the rdmsr also should)?
rdmsr will inject #GP for these msrs. Implementing
set_msr()doesn't affect rdmsr.From the AMD programming manual, vol 2:
Quoted 9 lines
Quoted 5 lines
The performance event-select registers can be read and written only by system software running at CPL = 0 using the RDMSR and WRMSR instructions, respectively. Any attempt to read or write these registers at CPL > 0 causes a general-protection exception to occur.
Look through the code that implements rdmsr, it doesn't care about the manuals and will happily inject a #GP for rdmsr of any unimplemented msr (like PerfEvtSel) wrmsr and rdmsr implementations are not linked.
Quoted 7 lines
That's right; but isn't that wrong if we cause it? I mean if we just allow the wrmsr access to go through (and if they're actually used, not disabled as you mentioned separately), then there'll be no interrupts when the guest expects them to occur, or the rdmsr will fail, when the guest thinks it shouldn't have.
It is wrong; but at least it fails loudly. We can't implement all msrs (Intel and AMD are adding them faster than we can code), so we must make sure that where we don't implement things, at least we have visibility if the guest tries to use them.
Quoted 4 lines
I guess we're putting forth the same point: if the wrmsr is not for disabling interrupts, we shouldn't let it go through, or just implement the required emulation.
Yes. Ignoring an msr will "fix" one guest but kill another.
Signature · 7 lines
error compiling committee.c: too many arguments to function ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 52 lines · Avi Kivity
Quoted 38 lines · Amit Shah
Quoted 30 lines · On Tuesday 20 November 2007 15:42:35 Avi Kivity wrote:
Quoted 20 lines · Amit Shah
Quoted 18 lines · On Tuesday 20 November 2007 15:17:54 Avi Kivity wrote:
Quoted 7 lines · Amit Shah
Quoted 5 lines · On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
this patch discards MSR writes to the Performance Event-Select Registers, this is the first issue why vista seems to fail although now vista ends up in an endless loop a bit later.
Qemu currently also discards those writes.Quoted 5 lines
Won't this make the corresponding rdmsrs fail? What happens when the rdmsr returns an error, but windows then uses some garbage value (as it
thinks the wrmsr succeeded, so the rdmsr also should)?rdmsr will inject #GP for these msrs. Implementing
set_msr()doesn't affect rdmsr.Quoted 8 lines
Quoted 1 line
From the AMD programming manual, vol 2:
The performance event-select registers can be read and written only by system software running at CPL = 0 using the RDMSR and WRMSR instructions, respectively. Any attempt to read or write these registers
at CPL > 0 causes a general-protection exception to occur.Quoted 5 lines
Look through the code that implements rdmsr, it doesn't care about the manuals and will happily inject a #GP for rdmsr of any unimplemented msr
(like PerfEvtSel) wrmsr and rdmsr implementations are not linked.Quoted 7 lines
That's right; but isn't that wrong if we cause it? I mean if we just allow the wrmsr access to go through (and if they're actually used, not disabled as you mentioned separately), then there'll be no interrupts when the guest expects them to occur, or the rdmsr will fail, when the guest thinks it shouldn't have.
It is wrong; but at least it fails loudly. We can't implement all msrs (Intel and AMD are adding them faster than we can code), so we must make sure that where we don't implement things, at least we have visibility if the guest tries to use them.
Quoted 7 lines
Quoted 4 lines
I guess we're putting forth the same point: if the wrmsr is not for disabling interrupts, we shouldn't let it go through, or just implement the required emulation.
Yes. Ignoring an msr will "fix" one guest but kill another.
I also discussed this with Joerg, since Qemu doesn't handle those MSR writes at the moment we think it's ok temporary. Lateron it should be emulated (but we're hunting a different issue at the moment). Our perfmon guys would also prefer a proper emulation.
Markus
-------------------------------------------------------------------------
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005.
http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/
Quoted 5 lines · Markus Rechberger
I also discussed this with Joerg, since Qemu doesn't handle those MSR writes at the moment we think it's ok temporary. Lateron it should be emulated (but we're hunting a different issue at the moment). Our perfmon guys would also prefer a proper emulation.
There's no need to copy mistakes from qemu. I too would prefer proper emulation, but meanwhile, if Vista disables performance monitoring when writing to these msrs, we can allow it, and error out if some other guest attempts to enable performance monitoring (which will fail silently).
Signature · 7 lines
error compiling committee.c: too many arguments to function ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/