sparc32 sun4m eccmemctl
PATCH 1/1 sparc32 sun4m eccmemctl
This patch adds sparc32 sun4m SMP ECC memory controller support.
Three files are attached:
The first is a diff to existing code.
The second is a diff for the new eccmemctl.c.
The third is the openboot outputs for the 3 systems that support this chip.
This patch is necessary for using sun openboot prom images because they expect the device to be present and will fault when it's not there.
A prom node will need to be added to openbios for this chip.
Index: Makefile.target
===================================================================
RCS file: /sources/qemu/qemu/Makefile.target,v
retrieving revision 1.230
Makefile.target +1 -1
@@ -482,7 +482,7 @@ VL_OBJS+= cirrus_vga.o parallel.o ptimer else VL_OBJS+= sun4m.o tcx.o pcnet.o iommu.o m48t59.o slavio_intctl.o VL_OBJS+= slavio_timer.o slavio_serial.o slavio_misc.o fdc.o esp.o sparc32_dma.o -VL_OBJS+= cs4231.o ptimer.o +VL_OBJS+= cs4231.o ptimer.o eccmemctl.o endif endif ifeq ($(TARGET_BASE_ARCH), arm)
Index: hw/sun4m.c
===================================================================
RCS file: /sources/qemu/qemu/hw/sun4m.c,v
retrieving revision 1.67
sun4m.c +10 -0
@@ -82,6 +82,8 @@ struct hwdef {uint32_t intbit_to_level[32 ];uint64_t max_mem;const char *const default_cpu_model; +target_phys_addr_t ecc_base; +uint32_t ecc_version; };/* TSC handling */
@@ -479,6 +481,9 @@ static void sun4m_hw_init(const struct hnvram_init (nvram, (uint8_t *)&nd_table[0 ].macaddr, kernel_cmdline, boot_device, RAM_size, kernel_size, graphic_width, graphic_height, graphic_depth, hwdef->machine_id); + +if (hwdef->ecc_base != (target_phys_addr_t)-1 ) +ecc_init (hwdef->ecc_base, hwdef->ecc_version); }static const struct hwdef hwdefs[] = {
@@ -517,6 +522,7 @@ static const struct hwdef hwdefs[] = { }, .max_mem = 0x10000000, .default_cpu_model = "Fujitsu MB86904", + .ecc_base = -1, },/* SS-10 */ {
@@ -553,6 +559,8 @@ static const struct hwdef hwdefs[] = { }, .max_mem = 0xffffffff, // XXX actually first 62GB ok .default_cpu_model = "TI SuperSparc II", + .ecc_base = 0xf00000000ULL, + .ecc_version = 0x10000000, // version 0, implementation 1 },/* SS-600MP */ {
@@ -589,6 +597,8 @@ static const struct hwdef hwdefs[] = { }, .max_mem = 0xffffffff, // XXX actually first 62GB ok .default_cpu_model = "TI SuperSparc II", + .ecc_base = 0xf00000000ULL, + .ecc_version = 0x00000000, // version 0, implementation 0 }, };
Index: hw/sun4m.h
===================================================================
RCS file: /sources/qemu/qemu/hw/sun4m.h,v
retrieving revision 1.3
sun4m.h +3 -0
@@ -72,4 +72,7 @@ void espdma_memory_write(void *opaque, uvoid lance_init (NICInfo *nd,target_phys_addr_t leaddr,void *dma_opaque,qemu_irq irq,qemu_irq *reset); +/* eccmemctl.c */ +void *ecc_init (target_phys_addr_t base,uint32_t version); +#endif
hw/eccmemctl.c +266 -0
266 lines not on this page · raw message
ss-20
<#0> ok cd /
<#0> ok cd eccmemctl
<#0> ok .attributes
address ffeee000 mc-type SMC width 00000020 reg 0000000f 00000000 00000020 name eccmemctl
ss-10
ok cd /
ok cd eccmemctl
ok .attributes
mc-type EMC address ffeee000 width 00000020 reg 0000000f 00000000 00000020 name eccmemctl
ss-600mp
ok cd /
ok cd eccmemctl
ok .attributes
address ffeee000 mc-type MCC width 00000020 reg 0000000f 00000000 00000020 name eccmemctl
Blue Swirl
AppliedQuoted 1 line · Robert Reif
This patch adds sparc32 sun4m SMP ECC memory controller support.
Thanks, applied. I just moved the ecc_base after the other bases.
Quoted 4 lines
Three files are attached:
The first is a diff to existing code.
The second is a diff for the neweccmemctl.c.
Please use same level diff for all, this was suitable for patch -p1 and the first one for patch -p0. I'd recommend using quilt (or maybe git) for patch management, it will make your life easier.
Quoted 6 lines
The third is the openboot outputs for the 3 systems that support this chip.
This patch is necessary for using sun openboot prom images because they expect the device to be present and will fault when it's not there.
A prom node will need to be added to openbios for this chip.
Thanks, I used these attributes to define the node, mc-type is probed from the device.
It seems that Linux and OpenBSD don't care about this device but NetBSD driver at least reads and prints the version.