at91_nand: Chip Select management

Hi,

Reviewing the at91_nand code, I was wondering why the chip select was using GPIO and moreover why this GPIO is never toggled during nand flash accesses.

Indeed, the Chip select is asserted during the probe routine and never released. Don't you think that it can lead to issues if we connect more than only one nand and a sdram chip on the EBI ?

If you can enlighten me...

Cheers,

Nicolas Ferre