Fix infinite loop when invalidating TLB

Hi,

In certain conditions, MIPS R4K TLB invalidation can lead to an infinite loop.
If 'end' address is 0xffffffffffffffff, invalidation loop should stop once 'addr' has flushed address 0xfffffffffffff000. Attached patch fixes this issue.

Hervé

Index: target-mips/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/helper.c,v retrieving revision 1.63

diff -u -r1.63 target-mips/helper.c
@@ -630,7 +630,7 @@
         }
 #endif
         end = addr | mask;
-        while (addr < end) {
+        while (addr - 1 < end) {
             tlb_flush_page (env, addr);
             addr += TARGET_PAGE_SIZE;
         }