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cfi02: Optionally remap chips multiple times

RFC PATCH In review Jan Kiszka 1 participant 1 message Apr 13, 2008

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Jan Kiszka

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RFC PATCH 2/4 cfi02: Optionally remap chips multiple times

On some boards the flash chip might be mapped several times into the address space. At least this happens on the MusicPal board (8 MB flash -> 4 times into a 32 MB window), and the cleanest way I found to deal with this is extending cfi02 with support for remapping the chip.

Again, if this is considered to be useful for cfi01 as well, I'm willing to extend the patch.

Signed-off-by Jan Kiszka <[email protected]>
---
 hw/flash.h         |    2 +-
 hw/pflash_cfi02.c  |   50 ++++++++++++++++++++++++++++++++------------------
 hw/ppc405_boards.c |   12 ++++++------
 3 files changed, 39 insertions(+), 25 deletions(-)
hw/flash.h +1 -1
Index: b/hw/flash.h
===================================================================
@@ -11,7 +11,7 @@ pflash_t *pflash_cfi01_register(target_p
 /* pflash_cfi02.c */
 pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
                                 BlockDriverState *bs, uint32_t sector_len,
-                                int nb_blocs, int width,
+                                int nb_blocs, int nb_mappings, int width,
                                 uint16_t id0, uint16_t id1,
                                 uint16_t id2, uint16_t id3,
                                 uint16_t unlock_addr0, uint16_t unlock_addr1);
hw/pflash_cfi02.c +32 -18

136 lines not on this page · raw message

hw/ppc405_boards.c +6 -6
Index: b/hw/ppc405_boards.c
===================================================================
@@ -235,8 +235,8 @@ static void ref405ep_init (int ram_size,
                bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
 #endif
         pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
-                              drives_table[index].bdrv, 65536, fl_sectors, 2,
-                              0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+                              drives_table[index].bdrv, 65536, fl_sectors, 1,
+                              2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
         fl_idx++;
     } else
 #endif

@@ -552,8 +552,8 @@ static void taihu_405ep_init(int ram_siz
                bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
 #endif
         pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
-                              drives_table[index].bdrv, 65536, fl_sectors, 4,
-                              0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+                              drives_table[index].bdrv, 65536, fl_sectors, 1,
+                              4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
         fl_idx++;
     } else
 #endif

@@ -588,8 +588,8 @@ static void taihu_405ep_init(int ram_siz
                bdrv_get_device_name(drives_table[index].bdrv));
 #endif
         pflash_cfi02_register(0xfc000000, bios_offset,
-                              drives_table[index].bdrv, 65536, fl_sectors, 4,
-                              0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+                              drives_table[index].bdrv, 65536, fl_sectors, 1,
+                              4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
         fl_idx++;
     }
     /* Register CLPD & LCD display */