stdvga cache always on

diff -r 483d006cc607 xen/arch/x86/hvm/stdvga.c
@@ -132,13 +132,12 @@ static int stdvga_outb(uint64_t addr, ui
     /* When in standard vga mode, emulate here all writes to the vram buffer
      * so we can immediately satisfy reads without waiting for qemu. */
     s->stdvga =
-        (s->sr[7] == 0x00) &&  /* standard vga mode */
-        (s->gr[6] == 0x05);    /* misc graphics register w/ MemoryMapSelect=1
-                                * 0xa0000-0xaffff (64k region), AlphaDis=1 */
+        (s->sr[7] == 0x00);    /* standard vga mode */
 
     if ( !prev_stdvga && s->stdvga )
     {
-        s->cache = 1;       /* (re)start caching video buffer */
+        s->cache = 1;       /* (re)start caching video buffer.
+                             * XXX In case of a restart the cache could be unsynced */
         gdprintk(XENLOG_INFO, "entering stdvga and caching modes\n");
     }
     else if ( prev_stdvga && !s->stdvga )

@@ -187,13 +186,33 @@ static uint8_t stdvga_mem_readb(uint64_t
 static uint8_t stdvga_mem_readb(uint64_t addr)
 {
     struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga;
-    int plane;
+    int memory_map_mode, plane;
     uint32_t ret, *vram_l;
     uint8_t *vram_b;
 
+    /* convert to VGA memory offset */
+    memory_map_mode = (s->gr[6] >> 2) & 3;
     addr &= 0x1ffff;
-    if ( addr >= 0x10000 )
-        return 0xff;
+    switch(memory_map_mode) {
+    case 0:
+        break;
+    case 1:
+        if (addr >= 0x10000)
+            return 0xff;
+        addr += 0; // assume bank_offset == 0;
+        break;
+    case 2:
+        addr -= 0x10000;
+        if (addr >= 0x8000)
+            return 0xff;
+        break;
+    default:
+    case 3:
+        addr -= 0x18000;
+        if (addr >= 0x8000)
+            return 0xff;
+        break;
+    }
 
     if ( s->sr[4] & 0x08 )
     {

@@ -269,13 +288,33 @@ static void stdvga_mem_writeb(uint64_t a
 static void stdvga_mem_writeb(uint64_t addr, uint32_t val)
 {
     struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga;
-    int plane, write_mode, b, func_select, mask;
+    int memory_map_mode, plane, write_mode, b, func_select, mask;
     uint32_t write_mask, bit_mask, set_mask, *vram_l;
     uint8_t *vram_b;
 
+    /* convert to VGA memory offset */
+    memory_map_mode = (s->gr[6] >> 2) & 3;
     addr &= 0x1ffff;
-    if ( addr >= 0x10000 )
-        return;
+    switch(memory_map_mode) {
+    case 0:
+        break;
+    case 1:
+        if (addr >= 0x10000)
+            return;
+        addr += 0; // assume bank_offset == 0;
+        break;
+    case 2:
+        addr -= 0x10000;
+        if (addr >= 0x8000)
+            return;
+        break;
+    default:
+    case 3:
+        addr -= 0x18000;
+        if (addr >= 0x8000)
+            return;
+        break;
+    }
 
     if ( s->sr[4] & 0x08 )
     {

@@ -531,7 +570,7 @@ void stdvga_init(struct domain *d)
         register_portio_handler(d, 0x3ce, 2, stdvga_intercept_pio);
         /* MMIO. */
         register_buffered_io_handler(
-            d, 0xa0000, 0x10000, stdvga_intercept_mmio);
+            d, 0xa0000, 0x20000, stdvga_intercept_mmio);
     }
 }