atmel_lcdfb: fix pixclok divider calculation

Fix divider calculation and allow CLKVAL = 0 (divisor 2)

It was not possible to get the clock value 0 (divisor 2) because the test "<=0" force the BYPASS bit to be activated instead.

---
Thanks a lot to Jan, Per, Roel and Haavard for sending me similar patches.

drivers/video/atmel_lcdfb.c | 7 +++----

1 files changed, 3 insertions(+), 4 deletions(-)

@@ -441,13 +441,12 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
 

	value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));

- value = (value / 2) - 1;
- dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
-
- if (value <= 0) {

+	if (value < 2) {
		dev_notice(info->device, "Bypassing pixel clock divider\n");
		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
	} else {
+		value = (value / 2) - 1;
+		dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n", value);
		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
		info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
		dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",