hvmloader: pci range cache policy

hvmloader: pci range cache policy

Use frame number instead address when we write the msr for the mtrr of the pci range.

Signed-off-by Jean Guyader <[email protected]>

diff -r ef7525e87030 tools/firmware/hvmloader/cacheattr.c

tools/firmware/hvmloader/cacheattr.c Fri May 23 15:53:32 2008 +0100 renamed from tools/firmware/hvmloader/cacheattr.c Fri May 23 11:58:08 2008 +0100 +2 -2

@@ -89,9 +89,9 @@ void cacheattr_init(void)
     if ( nr_var_ranges != 0 )
     {
         /* A single UC range covering PCI space. */
-        wrmsr(MSR_MTRRphysBase(0), PCI_MEMBASE);
+        wrmsr(MSR_MTRRphysBase(0), PCI_MEMBASE >> PAGE_SHIFT);
         wrmsr(MSR_MTRRphysMask(0),
-              ((uint64_t)(int32_t)PCI_MEMBASE & addr_mask) | (1u << 11));
+              (((uint64_t)(int32_t)PCI_MEMBASE & addr_mask) | (1u << 11)) >>
 PAGE_SHIFT);
         printf("var MTRRs ... ");
     }

diff -r ef7525e87030 tools/firmware/hvmloader/util.h

tools/firmware/hvmloader/util.h Fri May 23 15:53:32 2008 +0100 renamed from tools/firmware/hvmloader/util.h Fri May 23 11:58:08 2008 +0100 +2 -0

@@ -9,6 +9,8 @@
 
 #undef NULL
 #define NULL ((void*)0)
+
+#define PAGE_SHIFT      12
 
 void __assert_failed(char *assertion, char *file, int line)
     __attribute__((noreturn));

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The code is correct as it is. The frame number goes into bits 12 upwards of the MSR, and this is equivalent to writing the full address into bits 0 upwards.

-- Keir